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/*
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 * OMAP clocks.
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 *
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 * Copyright (C) 2006-2007 Andrzej Zaborowski  <balrog@zabor.org>
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 *
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 * Clocks data comes in part from arch/arm/mach-omap1/clock.h in Linux.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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#include "hw.h"
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#include "omap.h"
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struct clk {
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    const char *name;
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    const char *alias;
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    struct clk *parent;
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    struct clk *child1;
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    struct clk *sibling;
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#define ALWAYS_ENABLED                (1 << 0)
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#define CLOCK_IN_OMAP310        (1 << 10)
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#define CLOCK_IN_OMAP730        (1 << 11)
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#define CLOCK_IN_OMAP1510        (1 << 12)
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#define CLOCK_IN_OMAP16XX        (1 << 13)
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    uint32_t flags;
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    int id;
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    int running;                /* Is currently ticking */
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    int enabled;                /* Is enabled, regardless of its input clk */
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    unsigned long rate;                /* Current rate (if .running) */
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    unsigned int divisor;        /* Rate relative to input (if .enabled) */
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    unsigned int multiplier;        /* Rate relative to input (if .enabled) */
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    qemu_irq users[16];                /* Who to notify on change */
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    int usecount;                /* Automatically idle when unused */
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};
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static struct clk xtal_osc12m = {
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    .name        = "xtal_osc_12m",
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    .rate        = 12000000,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk xtal_osc32k = {
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    .name        = "xtal_osc_32k",
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    .rate        = 32768,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk ck_ref = {
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    .name        = "ck_ref",
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    .alias        = "clkin",
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    .parent        = &xtal_osc12m,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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/* If a dpll is disabled it becomes a bypass, child clocks don't stop */
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static struct clk dpll1 = {
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    .name        = "dpll1",
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    .parent        = &ck_ref,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk dpll2 = {
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    .name        = "dpll2",
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    .parent        = &ck_ref,
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    .flags        = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk dpll3 = {
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    .name        = "dpll3",
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    .parent        = &ck_ref,
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    .flags        = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk dpll4 = {
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    .name        = "dpll4",
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    .parent        = &ck_ref,
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    .multiplier        = 4,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk apll = {
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    .name        = "apll",
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    .parent        = &ck_ref,
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    .multiplier        = 48,
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    .divisor        = 12,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk ck_48m = {
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    .name        = "ck_48m",
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    .parent        = &dpll4,        /* either dpll4 or apll */
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk ck_dpll1out = {
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    .name        = "ck_dpll1out",
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    .parent        = &dpll1,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk sossi_ck = {
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    .name        = "ck_sossi",
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    .parent        = &ck_dpll1out,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk clkm1 = {
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    .name        = "clkm1",
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    .alias        = "ck_gen1",
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    .parent        = &dpll1,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk clkm2 = {
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    .name        = "clkm2",
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    .alias        = "ck_gen2",
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    .parent        = &dpll1,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk clkm3 = {
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    .name        = "clkm3",
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    .alias        = "ck_gen3",
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    .parent        = &dpll1,        /* either dpll1 or ck_ref */
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk arm_ck = {
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    .name        = "arm_ck",
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    .alias        = "mpu_ck",
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    .parent        = &clkm1,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk armper_ck = {
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    .name        = "armper_ck",
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    .alias        = "mpuper_ck",
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    .parent        = &clkm1,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk arm_gpio_ck = {
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    .name        = "arm_gpio_ck",
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    .alias        = "mpu_gpio_ck",
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    .parent        = &clkm1,
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    .divisor        = 1,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk armxor_ck = {
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    .name        = "armxor_ck",
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    .alias        = "mpuxor_ck",
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    .parent        = &ck_ref,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk armtim_ck = {
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    .name        = "armtim_ck",
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    .alias        = "mputim_ck",
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    .parent        = &ck_ref,        /* either CLKIN or DPLL1 */
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk armwdt_ck = {
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    .name        = "armwdt_ck",
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    .alias        = "mpuwd_ck",
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    .parent        = &clkm1,
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    .divisor        = 14,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk arminth_ck16xx = {
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    .name        = "arminth_ck",
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    .parent        = &arm_ck,
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    .flags        = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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    /* Note: On 16xx the frequency can be divided by 2 by programming
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     * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
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     *
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     * 1510 version is in TC clocks.
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     */
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};
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static struct clk dsp_ck = {
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    .name        = "dsp_ck",
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    .parent        = &clkm2,
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk dspmmu_ck = {
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    .name        = "dspmmu_ck",
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    .parent        = &clkm2,
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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            ALWAYS_ENABLED,
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};
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static struct clk dspper_ck = {
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    .name        = "dspper_ck",
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    .parent        = &clkm2,
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk dspxor_ck = {
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    .name        = "dspxor_ck",
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    .parent        = &ck_ref,
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk dsptim_ck = {
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    .name        = "dsptim_ck",
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    .parent        = &ck_ref,
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk tc_ck = {
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    .name        = "tc_ck",
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    .parent        = &clkm3,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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            CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk arminth_ck15xx = {
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    .name        = "arminth_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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    /* Note: On 1510 the frequency follows TC_CK
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     *
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     * 16xx version is in MPU clocks.
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     */
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};
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static struct clk tipb_ck = {
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    /* No-idle controlled by "tc_ck" */
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    .name        = "tipb_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk l3_ocpi_ck = {
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    /* No-idle controlled by "tc_ck" */
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    .name        = "l3_ocpi_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk tc1_ck = {
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    .name        = "tc1_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk tc2_ck = {
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    .name        = "tc2_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk dma_ck = {
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    /* No-idle controlled by "tc_ck" */
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    .name        = "dma_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk dma_lcdfree_ck = {
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    .name        = "dma_lcdfree_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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};
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static struct clk api_ck = {
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    .name        = "api_ck",
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    .alias        = "mpui_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk lb_ck = {
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    .name        = "lb_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk lbfree_ck = {
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    .name        = "lbfree_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk hsab_ck = {
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    .name        = "hsab_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk rhea1_ck = {
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    .name        = "rhea1_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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};
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static struct clk rhea2_ck = {
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    .name        = "rhea2_ck",
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    .parent        = &tc_ck,
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    .flags        = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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};
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static struct clk lcd_ck_16xx = {
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    .name        = "lcd_ck",
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    .parent        = &clkm3,
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    .flags        = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
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};
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static struct clk lcd_ck_1510 = {
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    .name        = "lcd_ck",
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    .parent        = &clkm3,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk uart1_1510 = {
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    .name        = "uart1_ck",
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    /* Direct from ULPD, no real parent */
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    .parent        = &armper_ck,        /* either armper_ck or dpll4 */
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    .rate        = 12000000,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk uart1_16xx = {
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    .name        = "uart1_ck",
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    /* Direct from ULPD, no real parent */
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    .parent        = &armper_ck,
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    .rate        = 48000000,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk uart2_ck = {
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    .name        = "uart2_ck",
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    /* Direct from ULPD, no real parent */
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    .parent        = &armper_ck,        /* either armper_ck or dpll4 */
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    .rate        = 12000000,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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            ALWAYS_ENABLED,
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};
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static struct clk uart3_1510 = {
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    .name        = "uart3_ck",
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    /* Direct from ULPD, no real parent */
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    .parent        = &armper_ck,        /* either armper_ck or dpll4 */
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    .rate        = 12000000,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk uart3_16xx = {
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    .name        = "uart3_ck",
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    /* Direct from ULPD, no real parent */
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    .parent        = &armper_ck,
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    .rate        = 48000000,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk usb_clk0 = {        /* 6 MHz output on W4_USB_CLK0 */
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    .name        = "usb_clk0",
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    .alias        = "usb.clko",
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    /* Direct from ULPD, no parent */
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    .rate        = 6000000,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk usb_hhc_ck1510 = {
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    .name        = "usb_hhc_ck",
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    /* Direct from ULPD, no parent */
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    .rate        = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk usb_hhc_ck16xx = {
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    .name        = "usb_hhc_ck",
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    /* Direct from ULPD, no parent */
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    .rate        = 48000000,
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    /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk usb_w2fc_mclk = {
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    .name        = "usb_w2fc_mclk",
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    .alias        = "usb_w2fc_ck",
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    .parent        = &ck_48m,
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    .rate        = 48000000,
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk mclk_1510 = {
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    .name        = "mclk",
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    /* Direct from ULPD, no parent. May be enabled by ext hardware. */
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    .rate        = 12000000,
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    .flags        = CLOCK_IN_OMAP1510,
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};
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static struct clk bclk_310 = {
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    .name        = "bt_mclk_out",        /* Alias midi_mclk_out? */
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    .parent        = &armper_ck,
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    .flags        = CLOCK_IN_OMAP310,
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};
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static struct clk mclk_310 = {
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    .name        = "com_mclk_out",
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    .parent        = &armper_ck,
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    .flags        = CLOCK_IN_OMAP310,
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};
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static struct clk mclk_16xx = {
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    .name        = "mclk",
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    /* Direct from ULPD, no parent. May be enabled by ext hardware. */
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk bclk_1510 = {
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    .name        = "bclk",
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    /* Direct from ULPD, no parent. May be enabled by ext hardware. */
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    .rate        = 12000000,
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    .flags        = CLOCK_IN_OMAP1510,
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};
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static struct clk bclk_16xx = {
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    .name        = "bclk",
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    /* Direct from ULPD, no parent. May be enabled by ext hardware. */
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk mmc1_ck = {
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    .name        = "mmc_ck",
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    .id                = 1,
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    /* Functional clock is direct from ULPD, interface clock is ARMPER */
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    .parent        = &armper_ck,        /* either armper_ck or dpll4 */
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    .rate        = 48000000,
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    .flags        = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk mmc2_ck = {
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    .name        = "mmc_ck",
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    .id                = 2,
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    /* Functional clock is direct from ULPD, interface clock is ARMPER */
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    .parent        = &armper_ck,
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    .rate        = 48000000,
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    .flags        = CLOCK_IN_OMAP16XX,
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};
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static struct clk cam_mclk = {
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    .name        = "cam.mclk",
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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    .rate        = 12000000,
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};
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static struct clk cam_exclk = {
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    .name        = "cam.exclk",
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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    /* Either 12M from cam.mclk or 48M from dpll4 */
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    .parent        = &cam_mclk,
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};
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static struct clk cam_lclk = {
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    .name        = "cam.lclk",
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk i2c_fck = {
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    .name        = "i2c_fck",
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    .id                = 1,
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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            ALWAYS_ENABLED,
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    .parent        = &armxor_ck,
493 c3d2689d balrog
};
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static struct clk i2c_ick = {
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    .name        = "i2c_ick",
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    .id                = 1,
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    .flags        = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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    .parent        = &armper_ck,
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};
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static struct clk clk32k = {
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    .name        = "clk32-kHz",
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    .flags        = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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            ALWAYS_ENABLED,
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    .parent     = &xtal_osc32k,
507 c3d2689d balrog
};
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static struct clk *onchip_clks[] = {
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    /* non-ULPD clocks */
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    &xtal_osc12m,
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    &xtal_osc32k,
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    &ck_ref,
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    &dpll1,
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    &dpll2,
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    &dpll3,
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    &dpll4,
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    &apll,
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    &ck_48m,
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    /* CK_GEN1 clocks */
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    &clkm1,
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    &ck_dpll1out,
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    &sossi_ck,
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    &arm_ck,
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    &armper_ck,
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    &arm_gpio_ck,
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    &armxor_ck,
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    &armtim_ck,
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    &armwdt_ck,
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    &arminth_ck15xx,  &arminth_ck16xx,
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    /* CK_GEN2 clocks */
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    &clkm2,
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    &dsp_ck,
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    &dspmmu_ck,
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    &dspper_ck,
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    &dspxor_ck,
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    &dsptim_ck,
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    /* CK_GEN3 clocks */
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    &clkm3,
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    &tc_ck,
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    &tipb_ck,
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    &l3_ocpi_ck,
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    &tc1_ck,
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    &tc2_ck,
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    &dma_ck,
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    &dma_lcdfree_ck,
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    &api_ck,
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    &lb_ck,
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    &lbfree_ck,
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    &hsab_ck,
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    &rhea1_ck,
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    &rhea2_ck,
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    &lcd_ck_16xx,
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    &lcd_ck_1510,
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    /* ULPD clocks */
556 c3d2689d balrog
    &uart1_1510,
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    &uart1_16xx,
558 c3d2689d balrog
    &uart2_ck,
559 c3d2689d balrog
    &uart3_1510,
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    &uart3_16xx,
561 c3d2689d balrog
    &usb_clk0,
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    &usb_hhc_ck1510, &usb_hhc_ck16xx,
563 c3d2689d balrog
    &mclk_1510,  &mclk_16xx, &mclk_310,
564 c3d2689d balrog
    &bclk_1510,  &bclk_16xx, &bclk_310,
565 c3d2689d balrog
    &mmc1_ck,
566 c3d2689d balrog
    &mmc2_ck,
567 c3d2689d balrog
    &cam_mclk,
568 c3d2689d balrog
    &cam_exclk,
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    &cam_lclk,
570 c3d2689d balrog
    &clk32k,
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    &usb_w2fc_mclk,
572 c3d2689d balrog
    /* Virtual clocks */
573 c3d2689d balrog
    &i2c_fck,
574 c3d2689d balrog
    &i2c_ick,
575 c3d2689d balrog
    0
576 c3d2689d balrog
};
577 c3d2689d balrog
578 c3d2689d balrog
void omap_clk_adduser(struct clk *clk, qemu_irq user)
579 c3d2689d balrog
{
580 c3d2689d balrog
    qemu_irq *i;
581 c3d2689d balrog
582 c3d2689d balrog
    for (i = clk->users; *i; i ++);
583 c3d2689d balrog
    *i = user;
584 c3d2689d balrog
}
585 c3d2689d balrog
586 c3d2689d balrog
/* If a clock is allowed to idle, it is disabled automatically when
587 c3d2689d balrog
 * all of clock domains using it are disabled.  */
588 c3d2689d balrog
int omap_clk_is_idle(struct clk *clk)
589 c3d2689d balrog
{
590 c3d2689d balrog
    struct clk *chld;
591 c3d2689d balrog
592 c3d2689d balrog
    if (!clk->enabled && (!clk->usecount || !(clk->flags && ALWAYS_ENABLED)))
593 c3d2689d balrog
        return 1;
594 c3d2689d balrog
    if (clk->usecount)
595 c3d2689d balrog
        return 0;
596 c3d2689d balrog
597 c3d2689d balrog
    for (chld = clk->child1; chld; chld = chld->sibling)
598 c3d2689d balrog
        if (!omap_clk_is_idle(chld))
599 c3d2689d balrog
            return 0;
600 c3d2689d balrog
    return 1;
601 c3d2689d balrog
}
602 c3d2689d balrog
603 c3d2689d balrog
struct clk *omap_findclk(struct omap_mpu_state_s *mpu, const char *name)
604 c3d2689d balrog
{
605 c3d2689d balrog
    struct clk *i;
606 c3d2689d balrog
607 c3d2689d balrog
    for (i = mpu->clks; i->name; i ++)
608 c3d2689d balrog
        if (!strcmp(i->name, name) || (i->alias && !strcmp(i->alias, name)))
609 c3d2689d balrog
            return i;
610 c3d2689d balrog
    cpu_abort(mpu->env, "%s: %s not found\n", __FUNCTION__, name);
611 c3d2689d balrog
}
612 c3d2689d balrog
613 c3d2689d balrog
void omap_clk_get(struct clk *clk)
614 c3d2689d balrog
{
615 c3d2689d balrog
    clk->usecount ++;
616 c3d2689d balrog
}
617 c3d2689d balrog
618 c3d2689d balrog
void omap_clk_put(struct clk *clk)
619 c3d2689d balrog
{
620 c3d2689d balrog
    if (!(clk->usecount --))
621 c3d2689d balrog
        cpu_abort(cpu_single_env, "%s: %s is not in use\n",
622 c3d2689d balrog
                        __FUNCTION__, clk->name);
623 c3d2689d balrog
}
624 c3d2689d balrog
625 c3d2689d balrog
static void omap_clk_update(struct clk *clk)
626 c3d2689d balrog
{
627 c3d2689d balrog
    int parent, running;
628 c3d2689d balrog
    qemu_irq *user;
629 c3d2689d balrog
    struct clk *i;
630 c3d2689d balrog
631 c3d2689d balrog
    if (clk->parent)
632 c3d2689d balrog
        parent = clk->parent->running;
633 c3d2689d balrog
    else
634 c3d2689d balrog
        parent = 1;
635 c3d2689d balrog
636 c3d2689d balrog
    running = parent && (clk->enabled ||
637 c3d2689d balrog
                    ((clk->flags & ALWAYS_ENABLED) && clk->usecount));
638 c3d2689d balrog
    if (clk->running != running) {
639 c3d2689d balrog
        clk->running = running;
640 c3d2689d balrog
        for (user = clk->users; *user; user ++)
641 c3d2689d balrog
            qemu_set_irq(*user, running);
642 c3d2689d balrog
        for (i = clk->child1; i; i = i->sibling)
643 c3d2689d balrog
            omap_clk_update(i);
644 c3d2689d balrog
    }
645 c3d2689d balrog
}
646 c3d2689d balrog
647 c3d2689d balrog
static void omap_clk_rate_update_full(struct clk *clk, unsigned long int rate,
648 c3d2689d balrog
                unsigned long int div, unsigned long int mult)
649 c3d2689d balrog
{
650 c3d2689d balrog
    struct clk *i;
651 c3d2689d balrog
    qemu_irq *user;
652 c3d2689d balrog
653 c3d2689d balrog
    clk->rate = muldiv64(rate, mult, div);
654 c3d2689d balrog
    if (clk->running)
655 c3d2689d balrog
        for (user = clk->users; *user; user ++)
656 c3d2689d balrog
            qemu_irq_raise(*user);
657 c3d2689d balrog
    for (i = clk->child1; i; i = i->sibling)
658 c3d2689d balrog
        omap_clk_rate_update_full(i, rate,
659 c3d2689d balrog
                        div * i->divisor, mult * i->multiplier);
660 c3d2689d balrog
}
661 c3d2689d balrog
662 c3d2689d balrog
static void omap_clk_rate_update(struct clk *clk)
663 c3d2689d balrog
{
664 c3d2689d balrog
    struct clk *i;
665 c3d2689d balrog
    unsigned long int div, mult = div = 1;
666 c3d2689d balrog
667 c3d2689d balrog
    for (i = clk; i->parent; i = i->parent) {
668 c3d2689d balrog
        div *= i->divisor;
669 c3d2689d balrog
        mult *= i->multiplier;
670 c3d2689d balrog
    }
671 c3d2689d balrog
672 c3d2689d balrog
    omap_clk_rate_update_full(clk, i->rate, div, mult);
673 c3d2689d balrog
}
674 c3d2689d balrog
675 c3d2689d balrog
void omap_clk_reparent(struct clk *clk, struct clk *parent)
676 c3d2689d balrog
{
677 c3d2689d balrog
    struct clk **p;
678 c3d2689d balrog
679 c3d2689d balrog
    if (clk->parent) {
680 c3d2689d balrog
        for (p = &clk->parent->child1; *p != clk; p = &(*p)->sibling);
681 c3d2689d balrog
        *p = clk->sibling;
682 c3d2689d balrog
    }
683 c3d2689d balrog
684 c3d2689d balrog
    clk->parent = parent;
685 c3d2689d balrog
    if (parent) {
686 c3d2689d balrog
        clk->sibling = parent->child1;
687 c3d2689d balrog
        parent->child1 = clk;
688 c3d2689d balrog
        omap_clk_update(clk);
689 c3d2689d balrog
        omap_clk_rate_update(clk);
690 c3d2689d balrog
    } else
691 c3d2689d balrog
        clk->sibling = 0;
692 c3d2689d balrog
}
693 c3d2689d balrog
694 c3d2689d balrog
void omap_clk_onoff(struct clk *clk, int on)
695 c3d2689d balrog
{
696 c3d2689d balrog
    clk->enabled = on;
697 c3d2689d balrog
    omap_clk_update(clk);
698 c3d2689d balrog
}
699 c3d2689d balrog
700 c3d2689d balrog
void omap_clk_canidle(struct clk *clk, int can)
701 c3d2689d balrog
{
702 c3d2689d balrog
    if (can)
703 c3d2689d balrog
        omap_clk_put(clk);
704 c3d2689d balrog
    else
705 c3d2689d balrog
        omap_clk_get(clk);
706 c3d2689d balrog
}
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708 c3d2689d balrog
void omap_clk_setrate(struct clk *clk, int divide, int multiply)
709 c3d2689d balrog
{
710 c3d2689d balrog
    clk->divisor = divide;
711 c3d2689d balrog
    clk->multiplier = multiply;
712 c3d2689d balrog
    omap_clk_rate_update(clk);
713 c3d2689d balrog
}
714 c3d2689d balrog
715 c3d2689d balrog
int64_t omap_clk_getrate(omap_clk clk)
716 c3d2689d balrog
{
717 c3d2689d balrog
    return clk->rate;
718 c3d2689d balrog
}
719 c3d2689d balrog
720 c3d2689d balrog
void omap_clk_init(struct omap_mpu_state_s *mpu)
721 c3d2689d balrog
{
722 c3d2689d balrog
    struct clk **i, *j, *k;
723 c3d2689d balrog
    int count;
724 c3d2689d balrog
    int flag;
725 c3d2689d balrog
726 c3d2689d balrog
    if (cpu_is_omap310(mpu))
727 c3d2689d balrog
        flag = CLOCK_IN_OMAP310;
728 c3d2689d balrog
    else if (cpu_is_omap1510(mpu))
729 c3d2689d balrog
        flag = CLOCK_IN_OMAP1510;
730 c3d2689d balrog
    else
731 c3d2689d balrog
        return;
732 c3d2689d balrog
733 c3d2689d balrog
    for (i = onchip_clks, count = 0; *i; i ++)
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        if ((*i)->flags & flag)
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            count ++;
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    mpu->clks = (struct clk *) qemu_mallocz(sizeof(struct clk) * (count + 1));
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    for (i = onchip_clks, j = mpu->clks; *i; i ++)
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        if ((*i)->flags & flag) {
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            memcpy(j, *i, sizeof(struct clk));
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            for (k = mpu->clks; k < j; k ++)
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                if (j->parent && !strcmp(j->parent->name, k->name)) {
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                    j->parent = k;
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                    j->sibling = k->child1;
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                    k->child1 = j;
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                } else if (k->parent && !strcmp(k->parent->name, j->name)) {
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                    k->parent = j;
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                    k->sibling = j->child1;
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                    j->child1 = k;
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                }
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            j->divisor = j->divisor ?: 1;
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            j->multiplier = j->multiplier ?: 1;
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            j ++;
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        }
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    for (j = mpu->clks; count --; j ++) {
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        omap_clk_update(j);
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        omap_clk_rate_update(j);
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    }
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}