root / hw / flash.h @ 87ecb68b
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/* NOR flash devices */
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typedef struct pflash_t pflash_t; |
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pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, |
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BlockDriverState *bs, |
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uint32_t sector_len, int nb_blocs, int width, |
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uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3); |
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/* nand.c */
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struct nand_flash_s;
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struct nand_flash_s *nand_init(int manf_id, int chip_id); |
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void nand_done(struct nand_flash_s *s); |
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void nand_setpins(struct nand_flash_s *s, |
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int cle, int ale, int ce, int wp, int gnd); |
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void nand_getpins(struct nand_flash_s *s, int *rb); |
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void nand_setio(struct nand_flash_s *s, uint8_t value); |
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uint8_t nand_getio(struct nand_flash_s *s);
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#define NAND_MFR_TOSHIBA 0x98 |
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#define NAND_MFR_SAMSUNG 0xec |
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#define NAND_MFR_FUJITSU 0x04 |
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#define NAND_MFR_NATIONAL 0x8f |
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#define NAND_MFR_RENESAS 0x07 |
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#define NAND_MFR_STMICRO 0x20 |
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#define NAND_MFR_HYNIX 0xad |
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#define NAND_MFR_MICRON 0x2c |
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/* ecc.c */
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struct ecc_state_s {
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uint8_t cp; /* Column parity */
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uint16_t lp[2]; /* Line parity */ |
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uint16_t count; |
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}; |
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uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample);
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void ecc_reset(struct ecc_state_s *s); |
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void ecc_put(QEMUFile *f, struct ecc_state_s *s); |
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void ecc_get(QEMUFile *f, struct ecc_state_s *s); |
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