root / hw / omap1_clk.c @ 87ecb68b
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/*
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* OMAP clocks.
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*
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* Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
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*
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* Clocks data comes in part from arch/arm/mach-omap1/clock.h in Linux.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include "hw.h" |
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#include "omap.h" |
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struct clk {
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const char *name; |
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const char *alias; |
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struct clk *parent;
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struct clk *child1;
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struct clk *sibling;
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#define ALWAYS_ENABLED (1 << 0) |
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#define CLOCK_IN_OMAP310 (1 << 10) |
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#define CLOCK_IN_OMAP730 (1 << 11) |
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#define CLOCK_IN_OMAP1510 (1 << 12) |
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#define CLOCK_IN_OMAP16XX (1 << 13) |
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uint32_t flags; |
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int id;
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int running; /* Is currently ticking */ |
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int enabled; /* Is enabled, regardless of its input clk */ |
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unsigned long rate; /* Current rate (if .running) */ |
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unsigned int divisor; /* Rate relative to input (if .enabled) */ |
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unsigned int multiplier; /* Rate relative to input (if .enabled) */ |
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qemu_irq users[16]; /* Who to notify on change */ |
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int usecount; /* Automatically idle when unused */ |
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}; |
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static struct clk xtal_osc12m = { |
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.name = "xtal_osc_12m",
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk xtal_osc32k = { |
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.name = "xtal_osc_32k",
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.rate = 32768,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk ck_ref = { |
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.name = "ck_ref",
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.alias = "clkin",
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.parent = &xtal_osc12m, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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/* If a dpll is disabled it becomes a bypass, child clocks don't stop */
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static struct clk dpll1 = { |
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.name = "dpll1",
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.parent = &ck_ref, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk dpll2 = { |
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.name = "dpll2",
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.parent = &ck_ref, |
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.flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
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}; |
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static struct clk dpll3 = { |
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.name = "dpll3",
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.parent = &ck_ref, |
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.flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
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}; |
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static struct clk dpll4 = { |
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.name = "dpll4",
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.parent = &ck_ref, |
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.multiplier = 4,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk apll = { |
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.name = "apll",
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.parent = &ck_ref, |
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.multiplier = 48,
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.divisor = 12,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk ck_48m = { |
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.name = "ck_48m",
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.parent = &dpll4, /* either dpll4 or apll */
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk ck_dpll1out = { |
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.name = "ck_dpll1out",
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.parent = &dpll1, |
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk sossi_ck = { |
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.name = "ck_sossi",
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.parent = &ck_dpll1out, |
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk clkm1 = { |
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.name = "clkm1",
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.alias = "ck_gen1",
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.parent = &dpll1, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk clkm2 = { |
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.name = "clkm2",
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.alias = "ck_gen2",
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.parent = &dpll1, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk clkm3 = { |
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.name = "clkm3",
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.alias = "ck_gen3",
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.parent = &dpll1, /* either dpll1 or ck_ref */
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk arm_ck = { |
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.name = "arm_ck",
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.alias = "mpu_ck",
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.parent = &clkm1, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk armper_ck = { |
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.name = "armper_ck",
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.alias = "mpuper_ck",
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.parent = &clkm1, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk arm_gpio_ck = { |
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.name = "arm_gpio_ck",
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.alias = "mpu_gpio_ck",
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.parent = &clkm1, |
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.divisor = 1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, |
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}; |
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static struct clk armxor_ck = { |
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.name = "armxor_ck",
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.alias = "mpuxor_ck",
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.parent = &ck_ref, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk armtim_ck = { |
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.name = "armtim_ck",
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.alias = "mputim_ck",
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.parent = &ck_ref, /* either CLKIN or DPLL1 */
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk armwdt_ck = { |
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.name = "armwdt_ck",
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.alias = "mpuwd_ck",
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.parent = &clkm1, |
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.divisor = 14,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk arminth_ck16xx = { |
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.name = "arminth_ck",
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.parent = &arm_ck, |
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
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/* Note: On 16xx the frequency can be divided by 2 by programming
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* ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
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*
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* 1510 version is in TC clocks.
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*/
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}; |
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static struct clk dsp_ck = { |
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.name = "dsp_ck",
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.parent = &clkm2, |
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk dspmmu_ck = { |
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.name = "dspmmu_ck",
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.parent = &clkm2, |
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk dspper_ck = { |
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.name = "dspper_ck",
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.parent = &clkm2, |
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk dspxor_ck = { |
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.name = "dspxor_ck",
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.parent = &ck_ref, |
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk dsptim_ck = { |
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.name = "dsptim_ck",
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.parent = &ck_ref, |
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk tc_ck = { |
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.name = "tc_ck",
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.parent = &clkm3, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
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CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk arminth_ck15xx = { |
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.name = "arminth_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
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/* Note: On 1510 the frequency follows TC_CK
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*
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* 16xx version is in MPU clocks.
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*/
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}; |
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static struct clk tipb_ck = { |
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/* No-idle controlled by "tc_ck" */
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.name = "tipb_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
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}; |
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static struct clk l3_ocpi_ck = { |
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/* No-idle controlled by "tc_ck" */
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.name = "l3_ocpi_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk tc1_ck = { |
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.name = "tc1_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk tc2_ck = { |
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.name = "tc2_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk dma_ck = { |
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/* No-idle controlled by "tc_ck" */
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.name = "dma_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk dma_lcdfree_ck = { |
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.name = "dma_lcdfree_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
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}; |
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static struct clk api_ck = { |
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.name = "api_ck",
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.alias = "mpui_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk lb_ck = { |
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.name = "lb_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, |
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}; |
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static struct clk lbfree_ck = { |
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.name = "lbfree_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, |
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}; |
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static struct clk hsab_ck = { |
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.name = "hsab_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, |
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}; |
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static struct clk rhea1_ck = { |
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.name = "rhea1_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
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}; |
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static struct clk rhea2_ck = { |
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.name = "rhea2_ck",
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.parent = &tc_ck, |
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
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}; |
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static struct clk lcd_ck_16xx = { |
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.name = "lcd_ck",
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.parent = &clkm3, |
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.flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730, |
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}; |
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static struct clk lcd_ck_1510 = { |
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.name = "lcd_ck",
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.parent = &clkm3, |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, |
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}; |
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static struct clk uart1_1510 = { |
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.name = "uart1_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck, /* either armper_ck or dpll4 */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
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}; |
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static struct clk uart1_16xx = { |
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.name = "uart1_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck, |
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk uart2_ck = { |
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.name = "uart2_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck, /* either armper_ck or dpll4 */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 | |
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ALWAYS_ENABLED, |
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}; |
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static struct clk uart3_1510 = { |
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.name = "uart3_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck, /* either armper_ck or dpll4 */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED, |
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}; |
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static struct clk uart3_16xx = { |
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.name = "uart3_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck, |
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk usb_clk0 = { /* 6 MHz output on W4_USB_CLK0 */ |
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.name = "usb_clk0",
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.alias = "usb.clko",
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/* Direct from ULPD, no parent */
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.rate = 6000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
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static struct clk usb_hhc_ck1510 = { |
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.name = "usb_hhc_ck",
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/* Direct from ULPD, no parent */
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.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ |
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, |
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}; |
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static struct clk usb_hhc_ck16xx = { |
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.name = "usb_hhc_ck",
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/* Direct from ULPD, no parent */
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.rate = 48000000,
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/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
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static struct clk usb_w2fc_mclk = { |
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.name = "usb_w2fc_mclk",
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.alias = "usb_w2fc_ck",
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.parent = &ck_48m, |
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
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}; |
412 |
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static struct clk mclk_1510 = { |
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.name = "mclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510, |
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}; |
419 |
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static struct clk bclk_310 = { |
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.name = "bt_mclk_out", /* Alias midi_mclk_out? */ |
422 |
.parent = &armper_ck, |
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.flags = CLOCK_IN_OMAP310, |
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}; |
425 |
|
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static struct clk mclk_310 = { |
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.name = "com_mclk_out",
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.parent = &armper_ck, |
429 |
.flags = CLOCK_IN_OMAP310, |
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}; |
431 |
|
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static struct clk mclk_16xx = { |
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.name = "mclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
437 |
|
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static struct clk bclk_1510 = { |
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.name = "bclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510, |
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}; |
444 |
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static struct clk bclk_16xx = { |
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.name = "bclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
450 |
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static struct clk mmc1_ck = { |
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.name = "mmc_ck",
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.id = 1,
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/* Functional clock is direct from ULPD, interface clock is ARMPER */
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.parent = &armper_ck, /* either armper_ck or dpll4 */
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310, |
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}; |
459 |
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static struct clk mmc2_ck = { |
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.name = "mmc_ck",
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.id = 2,
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/* Functional clock is direct from ULPD, interface clock is ARMPER */
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.parent = &armper_ck, |
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP16XX, |
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}; |
468 |
|
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static struct clk cam_mclk = { |
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.name = "cam.mclk",
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
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.rate = 12000000,
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}; |
474 |
|
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static struct clk cam_exclk = { |
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.name = "cam.exclk",
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
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/* Either 12M from cam.mclk or 48M from dpll4 */
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.parent = &cam_mclk, |
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}; |
481 |
|
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static struct clk cam_lclk = { |
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.name = "cam.lclk",
|
484 |
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX, |
485 |
}; |
486 |
|
487 |
static struct clk i2c_fck = { |
488 |
.name = "i2c_fck",
|
489 |
.id = 1,
|
490 |
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
491 |
ALWAYS_ENABLED, |
492 |
.parent = &armxor_ck, |
493 |
}; |
494 |
|
495 |
static struct clk i2c_ick = { |
496 |
.name = "i2c_ick",
|
497 |
.id = 1,
|
498 |
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, |
499 |
.parent = &armper_ck, |
500 |
}; |
501 |
|
502 |
static struct clk clk32k = { |
503 |
.name = "clk32-kHz",
|
504 |
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
505 |
ALWAYS_ENABLED, |
506 |
.parent = &xtal_osc32k, |
507 |
}; |
508 |
|
509 |
static struct clk *onchip_clks[] = { |
510 |
/* non-ULPD clocks */
|
511 |
&xtal_osc12m, |
512 |
&xtal_osc32k, |
513 |
&ck_ref, |
514 |
&dpll1, |
515 |
&dpll2, |
516 |
&dpll3, |
517 |
&dpll4, |
518 |
&apll, |
519 |
&ck_48m, |
520 |
/* CK_GEN1 clocks */
|
521 |
&clkm1, |
522 |
&ck_dpll1out, |
523 |
&sossi_ck, |
524 |
&arm_ck, |
525 |
&armper_ck, |
526 |
&arm_gpio_ck, |
527 |
&armxor_ck, |
528 |
&armtim_ck, |
529 |
&armwdt_ck, |
530 |
&arminth_ck15xx, &arminth_ck16xx, |
531 |
/* CK_GEN2 clocks */
|
532 |
&clkm2, |
533 |
&dsp_ck, |
534 |
&dspmmu_ck, |
535 |
&dspper_ck, |
536 |
&dspxor_ck, |
537 |
&dsptim_ck, |
538 |
/* CK_GEN3 clocks */
|
539 |
&clkm3, |
540 |
&tc_ck, |
541 |
&tipb_ck, |
542 |
&l3_ocpi_ck, |
543 |
&tc1_ck, |
544 |
&tc2_ck, |
545 |
&dma_ck, |
546 |
&dma_lcdfree_ck, |
547 |
&api_ck, |
548 |
&lb_ck, |
549 |
&lbfree_ck, |
550 |
&hsab_ck, |
551 |
&rhea1_ck, |
552 |
&rhea2_ck, |
553 |
&lcd_ck_16xx, |
554 |
&lcd_ck_1510, |
555 |
/* ULPD clocks */
|
556 |
&uart1_1510, |
557 |
&uart1_16xx, |
558 |
&uart2_ck, |
559 |
&uart3_1510, |
560 |
&uart3_16xx, |
561 |
&usb_clk0, |
562 |
&usb_hhc_ck1510, &usb_hhc_ck16xx, |
563 |
&mclk_1510, &mclk_16xx, &mclk_310, |
564 |
&bclk_1510, &bclk_16xx, &bclk_310, |
565 |
&mmc1_ck, |
566 |
&mmc2_ck, |
567 |
&cam_mclk, |
568 |
&cam_exclk, |
569 |
&cam_lclk, |
570 |
&clk32k, |
571 |
&usb_w2fc_mclk, |
572 |
/* Virtual clocks */
|
573 |
&i2c_fck, |
574 |
&i2c_ick, |
575 |
0
|
576 |
}; |
577 |
|
578 |
void omap_clk_adduser(struct clk *clk, qemu_irq user) |
579 |
{ |
580 |
qemu_irq *i; |
581 |
|
582 |
for (i = clk->users; *i; i ++);
|
583 |
*i = user; |
584 |
} |
585 |
|
586 |
/* If a clock is allowed to idle, it is disabled automatically when
|
587 |
* all of clock domains using it are disabled. */
|
588 |
int omap_clk_is_idle(struct clk *clk) |
589 |
{ |
590 |
struct clk *chld;
|
591 |
|
592 |
if (!clk->enabled && (!clk->usecount || !(clk->flags && ALWAYS_ENABLED)))
|
593 |
return 1; |
594 |
if (clk->usecount)
|
595 |
return 0; |
596 |
|
597 |
for (chld = clk->child1; chld; chld = chld->sibling)
|
598 |
if (!omap_clk_is_idle(chld))
|
599 |
return 0; |
600 |
return 1; |
601 |
} |
602 |
|
603 |
struct clk *omap_findclk(struct omap_mpu_state_s *mpu, const char *name) |
604 |
{ |
605 |
struct clk *i;
|
606 |
|
607 |
for (i = mpu->clks; i->name; i ++)
|
608 |
if (!strcmp(i->name, name) || (i->alias && !strcmp(i->alias, name)))
|
609 |
return i;
|
610 |
cpu_abort(mpu->env, "%s: %s not found\n", __FUNCTION__, name);
|
611 |
} |
612 |
|
613 |
void omap_clk_get(struct clk *clk) |
614 |
{ |
615 |
clk->usecount ++; |
616 |
} |
617 |
|
618 |
void omap_clk_put(struct clk *clk) |
619 |
{ |
620 |
if (!(clk->usecount --))
|
621 |
cpu_abort(cpu_single_env, "%s: %s is not in use\n",
|
622 |
__FUNCTION__, clk->name); |
623 |
} |
624 |
|
625 |
static void omap_clk_update(struct clk *clk) |
626 |
{ |
627 |
int parent, running;
|
628 |
qemu_irq *user; |
629 |
struct clk *i;
|
630 |
|
631 |
if (clk->parent)
|
632 |
parent = clk->parent->running; |
633 |
else
|
634 |
parent = 1;
|
635 |
|
636 |
running = parent && (clk->enabled || |
637 |
((clk->flags & ALWAYS_ENABLED) && clk->usecount)); |
638 |
if (clk->running != running) {
|
639 |
clk->running = running; |
640 |
for (user = clk->users; *user; user ++)
|
641 |
qemu_set_irq(*user, running); |
642 |
for (i = clk->child1; i; i = i->sibling)
|
643 |
omap_clk_update(i); |
644 |
} |
645 |
} |
646 |
|
647 |
static void omap_clk_rate_update_full(struct clk *clk, unsigned long int rate, |
648 |
unsigned long int div, unsigned long int mult) |
649 |
{ |
650 |
struct clk *i;
|
651 |
qemu_irq *user; |
652 |
|
653 |
clk->rate = muldiv64(rate, mult, div); |
654 |
if (clk->running)
|
655 |
for (user = clk->users; *user; user ++)
|
656 |
qemu_irq_raise(*user); |
657 |
for (i = clk->child1; i; i = i->sibling)
|
658 |
omap_clk_rate_update_full(i, rate, |
659 |
div * i->divisor, mult * i->multiplier); |
660 |
} |
661 |
|
662 |
static void omap_clk_rate_update(struct clk *clk) |
663 |
{ |
664 |
struct clk *i;
|
665 |
unsigned long int div, mult = div = 1; |
666 |
|
667 |
for (i = clk; i->parent; i = i->parent) {
|
668 |
div *= i->divisor; |
669 |
mult *= i->multiplier; |
670 |
} |
671 |
|
672 |
omap_clk_rate_update_full(clk, i->rate, div, mult); |
673 |
} |
674 |
|
675 |
void omap_clk_reparent(struct clk *clk, struct clk *parent) |
676 |
{ |
677 |
struct clk **p;
|
678 |
|
679 |
if (clk->parent) {
|
680 |
for (p = &clk->parent->child1; *p != clk; p = &(*p)->sibling);
|
681 |
*p = clk->sibling; |
682 |
} |
683 |
|
684 |
clk->parent = parent; |
685 |
if (parent) {
|
686 |
clk->sibling = parent->child1; |
687 |
parent->child1 = clk; |
688 |
omap_clk_update(clk); |
689 |
omap_clk_rate_update(clk); |
690 |
} else
|
691 |
clk->sibling = 0;
|
692 |
} |
693 |
|
694 |
void omap_clk_onoff(struct clk *clk, int on) |
695 |
{ |
696 |
clk->enabled = on; |
697 |
omap_clk_update(clk); |
698 |
} |
699 |
|
700 |
void omap_clk_canidle(struct clk *clk, int can) |
701 |
{ |
702 |
if (can)
|
703 |
omap_clk_put(clk); |
704 |
else
|
705 |
omap_clk_get(clk); |
706 |
} |
707 |
|
708 |
void omap_clk_setrate(struct clk *clk, int divide, int multiply) |
709 |
{ |
710 |
clk->divisor = divide; |
711 |
clk->multiplier = multiply; |
712 |
omap_clk_rate_update(clk); |
713 |
} |
714 |
|
715 |
int64_t omap_clk_getrate(omap_clk clk) |
716 |
{ |
717 |
return clk->rate;
|
718 |
} |
719 |
|
720 |
void omap_clk_init(struct omap_mpu_state_s *mpu) |
721 |
{ |
722 |
struct clk **i, *j, *k;
|
723 |
int count;
|
724 |
int flag;
|
725 |
|
726 |
if (cpu_is_omap310(mpu))
|
727 |
flag = CLOCK_IN_OMAP310; |
728 |
else if (cpu_is_omap1510(mpu)) |
729 |
flag = CLOCK_IN_OMAP1510; |
730 |
else
|
731 |
return;
|
732 |
|
733 |
for (i = onchip_clks, count = 0; *i; i ++) |
734 |
if ((*i)->flags & flag)
|
735 |
count ++; |
736 |
mpu->clks = (struct clk *) qemu_mallocz(sizeof(struct clk) * (count + 1)); |
737 |
for (i = onchip_clks, j = mpu->clks; *i; i ++)
|
738 |
if ((*i)->flags & flag) {
|
739 |
memcpy(j, *i, sizeof(struct clk)); |
740 |
for (k = mpu->clks; k < j; k ++)
|
741 |
if (j->parent && !strcmp(j->parent->name, k->name)) {
|
742 |
j->parent = k; |
743 |
j->sibling = k->child1; |
744 |
k->child1 = j; |
745 |
} else if (k->parent && !strcmp(k->parent->name, j->name)) { |
746 |
k->parent = j; |
747 |
k->sibling = j->child1; |
748 |
j->child1 = k; |
749 |
} |
750 |
j->divisor = j->divisor ?: 1;
|
751 |
j->multiplier = j->multiplier ?: 1;
|
752 |
j ++; |
753 |
} |
754 |
for (j = mpu->clks; count --; j ++) {
|
755 |
omap_clk_update(j); |
756 |
omap_clk_rate_update(j); |
757 |
} |
758 |
} |