root / hw / pc.c @ 87ecb68b
History | View | Annotate | Download (28.7 kB)
1 |
/*
|
---|---|
2 |
* QEMU PC System Emulator
|
3 |
*
|
4 |
* Copyright (c) 2003-2004 Fabrice Bellard
|
5 |
*
|
6 |
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 |
* of this software and associated documentation files (the "Software"), to deal
|
8 |
* in the Software without restriction, including without limitation the rights
|
9 |
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 |
* copies of the Software, and to permit persons to whom the Software is
|
11 |
* furnished to do so, subject to the following conditions:
|
12 |
*
|
13 |
* The above copyright notice and this permission notice shall be included in
|
14 |
* all copies or substantial portions of the Software.
|
15 |
*
|
16 |
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 |
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 |
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 |
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 |
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 |
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 |
* THE SOFTWARE.
|
23 |
*/
|
24 |
#include "hw.h" |
25 |
#include "pc.h" |
26 |
#include "fdc.h" |
27 |
#include "pci.h" |
28 |
#include "block.h" |
29 |
#include "sysemu.h" |
30 |
#include "audio/audio.h" |
31 |
#include "net.h" |
32 |
#include "smbus.h" |
33 |
#include "boards.h" |
34 |
|
35 |
/* output Bochs bios info messages */
|
36 |
//#define DEBUG_BIOS
|
37 |
|
38 |
#define BIOS_FILENAME "bios.bin" |
39 |
#define VGABIOS_FILENAME "vgabios.bin" |
40 |
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
41 |
|
42 |
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
|
43 |
#define ACPI_DATA_SIZE 0x10000 |
44 |
|
45 |
static fdctrl_t *floppy_controller;
|
46 |
static RTCState *rtc_state;
|
47 |
static PITState *pit;
|
48 |
static IOAPICState *ioapic;
|
49 |
static PCIDevice *i440fx_state;
|
50 |
|
51 |
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
52 |
{ |
53 |
} |
54 |
|
55 |
/* MSDOS compatibility mode FPU exception support */
|
56 |
static qemu_irq ferr_irq;
|
57 |
/* XXX: add IGNNE support */
|
58 |
void cpu_set_ferr(CPUX86State *s)
|
59 |
{ |
60 |
qemu_irq_raise(ferr_irq); |
61 |
} |
62 |
|
63 |
static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
64 |
{ |
65 |
qemu_irq_lower(ferr_irq); |
66 |
} |
67 |
|
68 |
/* TSC handling */
|
69 |
uint64_t cpu_get_tsc(CPUX86State *env) |
70 |
{ |
71 |
/* Note: when using kqemu, it is more logical to return the host TSC
|
72 |
because kqemu does not trap the RDTSC instruction for
|
73 |
performance reasons */
|
74 |
#if USE_KQEMU
|
75 |
if (env->kqemu_enabled) {
|
76 |
return cpu_get_real_ticks();
|
77 |
} else
|
78 |
#endif
|
79 |
{ |
80 |
return cpu_get_ticks();
|
81 |
} |
82 |
} |
83 |
|
84 |
/* SMM support */
|
85 |
void cpu_smm_update(CPUState *env)
|
86 |
{ |
87 |
if (i440fx_state && env == first_cpu)
|
88 |
i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
|
89 |
} |
90 |
|
91 |
|
92 |
/* IRQ handling */
|
93 |
int cpu_get_pic_interrupt(CPUState *env)
|
94 |
{ |
95 |
int intno;
|
96 |
|
97 |
intno = apic_get_interrupt(env); |
98 |
if (intno >= 0) { |
99 |
/* set irq request if a PIC irq is still pending */
|
100 |
/* XXX: improve that */
|
101 |
pic_update_irq(isa_pic); |
102 |
return intno;
|
103 |
} |
104 |
/* read the irq from the PIC */
|
105 |
if (!apic_accept_pic_intr(env))
|
106 |
return -1; |
107 |
|
108 |
intno = pic_read_irq(isa_pic); |
109 |
return intno;
|
110 |
} |
111 |
|
112 |
static void pic_irq_request(void *opaque, int irq, int level) |
113 |
{ |
114 |
CPUState *env = opaque; |
115 |
if (level && apic_accept_pic_intr(env))
|
116 |
cpu_interrupt(env, CPU_INTERRUPT_HARD); |
117 |
} |
118 |
|
119 |
/* PC cmos mappings */
|
120 |
|
121 |
#define REG_EQUIPMENT_BYTE 0x14 |
122 |
|
123 |
static int cmos_get_fd_drive_type(int fd0) |
124 |
{ |
125 |
int val;
|
126 |
|
127 |
switch (fd0) {
|
128 |
case 0: |
129 |
/* 1.44 Mb 3"5 drive */
|
130 |
val = 4;
|
131 |
break;
|
132 |
case 1: |
133 |
/* 2.88 Mb 3"5 drive */
|
134 |
val = 5;
|
135 |
break;
|
136 |
case 2: |
137 |
/* 1.2 Mb 5"5 drive */
|
138 |
val = 2;
|
139 |
break;
|
140 |
default:
|
141 |
val = 0;
|
142 |
break;
|
143 |
} |
144 |
return val;
|
145 |
} |
146 |
|
147 |
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
148 |
{ |
149 |
RTCState *s = rtc_state; |
150 |
int cylinders, heads, sectors;
|
151 |
bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
152 |
rtc_set_memory(s, type_ofs, 47);
|
153 |
rtc_set_memory(s, info_ofs, cylinders); |
154 |
rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
155 |
rtc_set_memory(s, info_ofs + 2, heads);
|
156 |
rtc_set_memory(s, info_ofs + 3, 0xff); |
157 |
rtc_set_memory(s, info_ofs + 4, 0xff); |
158 |
rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
159 |
rtc_set_memory(s, info_ofs + 6, cylinders);
|
160 |
rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
161 |
rtc_set_memory(s, info_ofs + 8, sectors);
|
162 |
} |
163 |
|
164 |
/* convert boot_device letter to something recognizable by the bios */
|
165 |
static int boot_device2nibble(char boot_device) |
166 |
{ |
167 |
switch(boot_device) {
|
168 |
case 'a': |
169 |
case 'b': |
170 |
return 0x01; /* floppy boot */ |
171 |
case 'c': |
172 |
return 0x02; /* hard drive boot */ |
173 |
case 'd': |
174 |
return 0x03; /* CD-ROM boot */ |
175 |
case 'n': |
176 |
return 0x04; /* Network boot */ |
177 |
} |
178 |
return 0; |
179 |
} |
180 |
|
181 |
/* hd_table must contain 4 block drivers */
|
182 |
static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table) |
183 |
{ |
184 |
RTCState *s = rtc_state; |
185 |
int nbds, bds[3] = { 0, }; |
186 |
int val;
|
187 |
int fd0, fd1, nb;
|
188 |
int i;
|
189 |
|
190 |
/* various important CMOS locations needed by PC/Bochs bios */
|
191 |
|
192 |
/* memory size */
|
193 |
val = 640; /* base memory in K */ |
194 |
rtc_set_memory(s, 0x15, val);
|
195 |
rtc_set_memory(s, 0x16, val >> 8); |
196 |
|
197 |
val = (ram_size / 1024) - 1024; |
198 |
if (val > 65535) |
199 |
val = 65535;
|
200 |
rtc_set_memory(s, 0x17, val);
|
201 |
rtc_set_memory(s, 0x18, val >> 8); |
202 |
rtc_set_memory(s, 0x30, val);
|
203 |
rtc_set_memory(s, 0x31, val >> 8); |
204 |
|
205 |
if (ram_size > (16 * 1024 * 1024)) |
206 |
val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
207 |
else
|
208 |
val = 0;
|
209 |
if (val > 65535) |
210 |
val = 65535;
|
211 |
rtc_set_memory(s, 0x34, val);
|
212 |
rtc_set_memory(s, 0x35, val >> 8); |
213 |
|
214 |
/* set boot devices, and disable floppy signature check if requested */
|
215 |
#define PC_MAX_BOOT_DEVICES 3 |
216 |
nbds = strlen(boot_device); |
217 |
if (nbds > PC_MAX_BOOT_DEVICES) {
|
218 |
fprintf(stderr, "Too many boot devices for PC\n");
|
219 |
exit(1);
|
220 |
} |
221 |
for (i = 0; i < nbds; i++) { |
222 |
bds[i] = boot_device2nibble(boot_device[i]); |
223 |
if (bds[i] == 0) { |
224 |
fprintf(stderr, "Invalid boot device for PC: '%c'\n",
|
225 |
boot_device[i]); |
226 |
exit(1);
|
227 |
} |
228 |
} |
229 |
rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
230 |
rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
231 |
|
232 |
/* floppy type */
|
233 |
|
234 |
fd0 = fdctrl_get_drive_type(floppy_controller, 0);
|
235 |
fd1 = fdctrl_get_drive_type(floppy_controller, 1);
|
236 |
|
237 |
val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
|
238 |
rtc_set_memory(s, 0x10, val);
|
239 |
|
240 |
val = 0;
|
241 |
nb = 0;
|
242 |
if (fd0 < 3) |
243 |
nb++; |
244 |
if (fd1 < 3) |
245 |
nb++; |
246 |
switch (nb) {
|
247 |
case 0: |
248 |
break;
|
249 |
case 1: |
250 |
val |= 0x01; /* 1 drive, ready for boot */ |
251 |
break;
|
252 |
case 2: |
253 |
val |= 0x41; /* 2 drives, ready for boot */ |
254 |
break;
|
255 |
} |
256 |
val |= 0x02; /* FPU is there */ |
257 |
val |= 0x04; /* PS/2 mouse installed */ |
258 |
rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
259 |
|
260 |
/* hard drives */
|
261 |
|
262 |
rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
263 |
if (hd_table[0]) |
264 |
cmos_init_hd(0x19, 0x1b, hd_table[0]); |
265 |
if (hd_table[1]) |
266 |
cmos_init_hd(0x1a, 0x24, hd_table[1]); |
267 |
|
268 |
val = 0;
|
269 |
for (i = 0; i < 4; i++) { |
270 |
if (hd_table[i]) {
|
271 |
int cylinders, heads, sectors, translation;
|
272 |
/* NOTE: bdrv_get_geometry_hint() returns the physical
|
273 |
geometry. It is always such that: 1 <= sects <= 63, 1
|
274 |
<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
|
275 |
geometry can be different if a translation is done. */
|
276 |
translation = bdrv_get_translation_hint(hd_table[i]); |
277 |
if (translation == BIOS_ATA_TRANSLATION_AUTO) {
|
278 |
bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
279 |
if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
280 |
/* No translation. */
|
281 |
translation = 0;
|
282 |
} else {
|
283 |
/* LBA translation. */
|
284 |
translation = 1;
|
285 |
} |
286 |
} else {
|
287 |
translation--; |
288 |
} |
289 |
val |= translation << (i * 2);
|
290 |
} |
291 |
} |
292 |
rtc_set_memory(s, 0x39, val);
|
293 |
} |
294 |
|
295 |
void ioport_set_a20(int enable) |
296 |
{ |
297 |
/* XXX: send to all CPUs ? */
|
298 |
cpu_x86_set_a20(first_cpu, enable); |
299 |
} |
300 |
|
301 |
int ioport_get_a20(void) |
302 |
{ |
303 |
return ((first_cpu->a20_mask >> 20) & 1); |
304 |
} |
305 |
|
306 |
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
307 |
{ |
308 |
ioport_set_a20((val >> 1) & 1); |
309 |
/* XXX: bit 0 is fast reset */
|
310 |
} |
311 |
|
312 |
static uint32_t ioport92_read(void *opaque, uint32_t addr) |
313 |
{ |
314 |
return ioport_get_a20() << 1; |
315 |
} |
316 |
|
317 |
/***********************************************************/
|
318 |
/* Bochs BIOS debug ports */
|
319 |
|
320 |
void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
321 |
{ |
322 |
static const char shutdown_str[8] = "Shutdown"; |
323 |
static int shutdown_index = 0; |
324 |
|
325 |
switch(addr) {
|
326 |
/* Bochs BIOS messages */
|
327 |
case 0x400: |
328 |
case 0x401: |
329 |
fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
330 |
exit(1);
|
331 |
case 0x402: |
332 |
case 0x403: |
333 |
#ifdef DEBUG_BIOS
|
334 |
fprintf(stderr, "%c", val);
|
335 |
#endif
|
336 |
break;
|
337 |
case 0x8900: |
338 |
/* same as Bochs power off */
|
339 |
if (val == shutdown_str[shutdown_index]) {
|
340 |
shutdown_index++; |
341 |
if (shutdown_index == 8) { |
342 |
shutdown_index = 0;
|
343 |
qemu_system_shutdown_request(); |
344 |
} |
345 |
} else {
|
346 |
shutdown_index = 0;
|
347 |
} |
348 |
break;
|
349 |
|
350 |
/* LGPL'ed VGA BIOS messages */
|
351 |
case 0x501: |
352 |
case 0x502: |
353 |
fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
354 |
exit(1);
|
355 |
case 0x500: |
356 |
case 0x503: |
357 |
#ifdef DEBUG_BIOS
|
358 |
fprintf(stderr, "%c", val);
|
359 |
#endif
|
360 |
break;
|
361 |
} |
362 |
} |
363 |
|
364 |
void bochs_bios_init(void) |
365 |
{ |
366 |
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
367 |
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
368 |
register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
369 |
register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
370 |
register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
371 |
|
372 |
register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
373 |
register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
374 |
register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
375 |
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
376 |
} |
377 |
|
378 |
/* Generate an initial boot sector which sets state and jump to
|
379 |
a specified vector */
|
380 |
static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
381 |
{ |
382 |
uint8_t bootsect[512], *p;
|
383 |
int i;
|
384 |
|
385 |
if (bs_table[0] == NULL) { |
386 |
fprintf(stderr, "A disk image must be given for 'hda' when booting "
|
387 |
"a Linux kernel\n");
|
388 |
exit(1);
|
389 |
} |
390 |
|
391 |
memset(bootsect, 0, sizeof(bootsect)); |
392 |
|
393 |
/* Copy the MSDOS partition table if possible */
|
394 |
bdrv_read(bs_table[0], 0, bootsect, 1); |
395 |
|
396 |
/* Make sure we have a partition signature */
|
397 |
bootsect[510] = 0x55; |
398 |
bootsect[511] = 0xaa; |
399 |
|
400 |
/* Actual code */
|
401 |
p = bootsect; |
402 |
*p++ = 0xfa; /* CLI */ |
403 |
*p++ = 0xfc; /* CLD */ |
404 |
|
405 |
for (i = 0; i < 6; i++) { |
406 |
if (i == 1) /* Skip CS */ |
407 |
continue;
|
408 |
|
409 |
*p++ = 0xb8; /* MOV AX,imm16 */ |
410 |
*p++ = segs[i]; |
411 |
*p++ = segs[i] >> 8;
|
412 |
*p++ = 0x8e; /* MOV <seg>,AX */ |
413 |
*p++ = 0xc0 + (i << 3); |
414 |
} |
415 |
|
416 |
for (i = 0; i < 8; i++) { |
417 |
*p++ = 0x66; /* 32-bit operand size */ |
418 |
*p++ = 0xb8 + i; /* MOV <reg>,imm32 */ |
419 |
*p++ = gpr[i]; |
420 |
*p++ = gpr[i] >> 8;
|
421 |
*p++ = gpr[i] >> 16;
|
422 |
*p++ = gpr[i] >> 24;
|
423 |
} |
424 |
|
425 |
*p++ = 0xea; /* JMP FAR */ |
426 |
*p++ = ip; /* IP */
|
427 |
*p++ = ip >> 8;
|
428 |
*p++ = segs[1]; /* CS */ |
429 |
*p++ = segs[1] >> 8; |
430 |
|
431 |
bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
432 |
} |
433 |
|
434 |
int load_kernel(const char *filename, uint8_t *addr, |
435 |
uint8_t *real_addr) |
436 |
{ |
437 |
int fd, size;
|
438 |
int setup_sects;
|
439 |
|
440 |
fd = open(filename, O_RDONLY | O_BINARY); |
441 |
if (fd < 0) |
442 |
return -1; |
443 |
|
444 |
/* load 16 bit code */
|
445 |
if (read(fd, real_addr, 512) != 512) |
446 |
goto fail;
|
447 |
setup_sects = real_addr[0x1F1];
|
448 |
if (!setup_sects)
|
449 |
setup_sects = 4;
|
450 |
if (read(fd, real_addr + 512, setup_sects * 512) != |
451 |
setup_sects * 512)
|
452 |
goto fail;
|
453 |
|
454 |
/* load 32 bit code */
|
455 |
size = read(fd, addr, 16 * 1024 * 1024); |
456 |
if (size < 0) |
457 |
goto fail;
|
458 |
close(fd); |
459 |
return size;
|
460 |
fail:
|
461 |
close(fd); |
462 |
return -1; |
463 |
} |
464 |
|
465 |
static long get_file_size(FILE *f) |
466 |
{ |
467 |
long where, size;
|
468 |
|
469 |
/* XXX: on Unix systems, using fstat() probably makes more sense */
|
470 |
|
471 |
where = ftell(f); |
472 |
fseek(f, 0, SEEK_END);
|
473 |
size = ftell(f); |
474 |
fseek(f, where, SEEK_SET); |
475 |
|
476 |
return size;
|
477 |
} |
478 |
|
479 |
static void load_linux(const char *kernel_filename, |
480 |
const char *initrd_filename, |
481 |
const char *kernel_cmdline) |
482 |
{ |
483 |
uint16_t protocol; |
484 |
uint32_t gpr[8];
|
485 |
uint16_t seg[6];
|
486 |
uint16_t real_seg; |
487 |
int setup_size, kernel_size, initrd_size, cmdline_size;
|
488 |
uint32_t initrd_max; |
489 |
uint8_t header[1024];
|
490 |
uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr; |
491 |
FILE *f, *fi; |
492 |
|
493 |
/* Align to 16 bytes as a paranoia measure */
|
494 |
cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
495 |
|
496 |
/* load the kernel header */
|
497 |
f = fopen(kernel_filename, "rb");
|
498 |
if (!f || !(kernel_size = get_file_size(f)) ||
|
499 |
fread(header, 1, 1024, f) != 1024) { |
500 |
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
501 |
kernel_filename); |
502 |
exit(1);
|
503 |
} |
504 |
|
505 |
/* kernel protocol version */
|
506 |
#if 0
|
507 |
fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
508 |
#endif
|
509 |
if (ldl_p(header+0x202) == 0x53726448) |
510 |
protocol = lduw_p(header+0x206);
|
511 |
else
|
512 |
protocol = 0;
|
513 |
|
514 |
if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
515 |
/* Low kernel */
|
516 |
real_addr = phys_ram_base + 0x90000;
|
517 |
cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
518 |
prot_addr = phys_ram_base + 0x10000;
|
519 |
} else if (protocol < 0x202) { |
520 |
/* High but ancient kernel */
|
521 |
real_addr = phys_ram_base + 0x90000;
|
522 |
cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
523 |
prot_addr = phys_ram_base + 0x100000;
|
524 |
} else {
|
525 |
/* High and recent kernel */
|
526 |
real_addr = phys_ram_base + 0x10000;
|
527 |
cmdline_addr = phys_ram_base + 0x20000;
|
528 |
prot_addr = phys_ram_base + 0x100000;
|
529 |
} |
530 |
|
531 |
#if 0
|
532 |
fprintf(stderr,
|
533 |
"qemu: real_addr = %#zx\n"
|
534 |
"qemu: cmdline_addr = %#zx\n"
|
535 |
"qemu: prot_addr = %#zx\n",
|
536 |
real_addr-phys_ram_base,
|
537 |
cmdline_addr-phys_ram_base,
|
538 |
prot_addr-phys_ram_base);
|
539 |
#endif
|
540 |
|
541 |
/* highest address for loading the initrd */
|
542 |
if (protocol >= 0x203) |
543 |
initrd_max = ldl_p(header+0x22c);
|
544 |
else
|
545 |
initrd_max = 0x37ffffff;
|
546 |
|
547 |
if (initrd_max >= ram_size-ACPI_DATA_SIZE)
|
548 |
initrd_max = ram_size-ACPI_DATA_SIZE-1;
|
549 |
|
550 |
/* kernel command line */
|
551 |
pstrcpy(cmdline_addr, 4096, kernel_cmdline);
|
552 |
|
553 |
if (protocol >= 0x202) { |
554 |
stl_p(header+0x228, cmdline_addr-phys_ram_base);
|
555 |
} else {
|
556 |
stw_p(header+0x20, 0xA33F); |
557 |
stw_p(header+0x22, cmdline_addr-real_addr);
|
558 |
} |
559 |
|
560 |
/* loader type */
|
561 |
/* High nybble = B reserved for Qemu; low nybble is revision number.
|
562 |
If this code is substantially changed, you may want to consider
|
563 |
incrementing the revision. */
|
564 |
if (protocol >= 0x200) |
565 |
header[0x210] = 0xB0; |
566 |
|
567 |
/* heap */
|
568 |
if (protocol >= 0x201) { |
569 |
header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
570 |
stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
571 |
} |
572 |
|
573 |
/* load initrd */
|
574 |
if (initrd_filename) {
|
575 |
if (protocol < 0x200) { |
576 |
fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
577 |
exit(1);
|
578 |
} |
579 |
|
580 |
fi = fopen(initrd_filename, "rb");
|
581 |
if (!fi) {
|
582 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
583 |
initrd_filename); |
584 |
exit(1);
|
585 |
} |
586 |
|
587 |
initrd_size = get_file_size(fi); |
588 |
initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
|
589 |
|
590 |
fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
|
591 |
initrd_size, initrd_addr-phys_ram_base); |
592 |
|
593 |
if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) { |
594 |
fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
|
595 |
initrd_filename); |
596 |
exit(1);
|
597 |
} |
598 |
fclose(fi); |
599 |
|
600 |
stl_p(header+0x218, initrd_addr-phys_ram_base);
|
601 |
stl_p(header+0x21c, initrd_size);
|
602 |
} |
603 |
|
604 |
/* store the finalized header and load the rest of the kernel */
|
605 |
memcpy(real_addr, header, 1024);
|
606 |
|
607 |
setup_size = header[0x1f1];
|
608 |
if (setup_size == 0) |
609 |
setup_size = 4;
|
610 |
|
611 |
setup_size = (setup_size+1)*512; |
612 |
kernel_size -= setup_size; /* Size of protected-mode code */
|
613 |
|
614 |
if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 || |
615 |
fread(prot_addr, 1, kernel_size, f) != kernel_size) {
|
616 |
fprintf(stderr, "qemu: read error on kernel '%s'\n",
|
617 |
kernel_filename); |
618 |
exit(1);
|
619 |
} |
620 |
fclose(f); |
621 |
|
622 |
/* generate bootsector to set up the initial register state */
|
623 |
real_seg = (real_addr-phys_ram_base) >> 4;
|
624 |
seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
625 |
seg[1] = real_seg+0x20; /* CS */ |
626 |
memset(gpr, 0, sizeof gpr); |
627 |
gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ |
628 |
|
629 |
generate_bootsect(gpr, seg, 0);
|
630 |
} |
631 |
|
632 |
static void main_cpu_reset(void *opaque) |
633 |
{ |
634 |
CPUState *env = opaque; |
635 |
cpu_reset(env); |
636 |
} |
637 |
|
638 |
static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
639 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
640 |
static const int ide_irq[2] = { 14, 15 }; |
641 |
|
642 |
#define NE2000_NB_MAX 6 |
643 |
|
644 |
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
645 |
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
646 |
|
647 |
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
648 |
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
649 |
|
650 |
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
651 |
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
652 |
|
653 |
#ifdef HAS_AUDIO
|
654 |
static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
655 |
{ |
656 |
struct soundhw *c;
|
657 |
int audio_enabled = 0; |
658 |
|
659 |
for (c = soundhw; !audio_enabled && c->name; ++c) {
|
660 |
audio_enabled = c->enabled; |
661 |
} |
662 |
|
663 |
if (audio_enabled) {
|
664 |
AudioState *s; |
665 |
|
666 |
s = AUD_init (); |
667 |
if (s) {
|
668 |
for (c = soundhw; c->name; ++c) {
|
669 |
if (c->enabled) {
|
670 |
if (c->isa) {
|
671 |
c->init.init_isa (s, pic); |
672 |
} |
673 |
else {
|
674 |
if (pci_bus) {
|
675 |
c->init.init_pci (pci_bus, s); |
676 |
} |
677 |
} |
678 |
} |
679 |
} |
680 |
} |
681 |
} |
682 |
} |
683 |
#endif
|
684 |
|
685 |
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
686 |
{ |
687 |
static int nb_ne2k = 0; |
688 |
|
689 |
if (nb_ne2k == NE2000_NB_MAX)
|
690 |
return;
|
691 |
isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
692 |
nb_ne2k++; |
693 |
} |
694 |
|
695 |
/* PC hardware initialisation */
|
696 |
static void pc_init1(int ram_size, int vga_ram_size, const char *boot_device, |
697 |
DisplayState *ds, const char **fd_filename, int snapshot, |
698 |
const char *kernel_filename, const char *kernel_cmdline, |
699 |
const char *initrd_filename, |
700 |
int pci_enabled, const char *cpu_model) |
701 |
{ |
702 |
char buf[1024]; |
703 |
int ret, linux_boot, i;
|
704 |
ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
705 |
int bios_size, isa_bios_size, vga_bios_size;
|
706 |
PCIBus *pci_bus; |
707 |
int piix3_devfn = -1; |
708 |
CPUState *env; |
709 |
NICInfo *nd; |
710 |
qemu_irq *cpu_irq; |
711 |
qemu_irq *i8259; |
712 |
|
713 |
linux_boot = (kernel_filename != NULL);
|
714 |
|
715 |
/* init CPUs */
|
716 |
if (cpu_model == NULL) { |
717 |
#ifdef TARGET_X86_64
|
718 |
cpu_model = "qemu64";
|
719 |
#else
|
720 |
cpu_model = "qemu32";
|
721 |
#endif
|
722 |
} |
723 |
|
724 |
for(i = 0; i < smp_cpus; i++) { |
725 |
env = cpu_init(cpu_model); |
726 |
if (!env) {
|
727 |
fprintf(stderr, "Unable to find x86 CPU definition\n");
|
728 |
exit(1);
|
729 |
} |
730 |
if (i != 0) |
731 |
env->hflags |= HF_HALTED_MASK; |
732 |
if (smp_cpus > 1) { |
733 |
/* XXX: enable it in all cases */
|
734 |
env->cpuid_features |= CPUID_APIC; |
735 |
} |
736 |
register_savevm("cpu", i, 4, cpu_save, cpu_load, env); |
737 |
qemu_register_reset(main_cpu_reset, env); |
738 |
if (pci_enabled) {
|
739 |
apic_init(env); |
740 |
} |
741 |
vmport_init(env); |
742 |
} |
743 |
|
744 |
/* allocate RAM */
|
745 |
ram_addr = qemu_ram_alloc(ram_size); |
746 |
cpu_register_physical_memory(0, ram_size, ram_addr);
|
747 |
|
748 |
/* allocate VGA RAM */
|
749 |
vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
750 |
|
751 |
/* BIOS load */
|
752 |
if (bios_name == NULL) |
753 |
bios_name = BIOS_FILENAME; |
754 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
755 |
bios_size = get_image_size(buf); |
756 |
if (bios_size <= 0 || |
757 |
(bios_size % 65536) != 0) { |
758 |
goto bios_error;
|
759 |
} |
760 |
bios_offset = qemu_ram_alloc(bios_size); |
761 |
ret = load_image(buf, phys_ram_base + bios_offset); |
762 |
if (ret != bios_size) {
|
763 |
bios_error:
|
764 |
fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
|
765 |
exit(1);
|
766 |
} |
767 |
|
768 |
/* VGA BIOS load */
|
769 |
if (cirrus_vga_enabled) {
|
770 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
771 |
} else {
|
772 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
773 |
} |
774 |
vga_bios_size = get_image_size(buf); |
775 |
if (vga_bios_size <= 0 || vga_bios_size > 65536) |
776 |
goto vga_bios_error;
|
777 |
vga_bios_offset = qemu_ram_alloc(65536);
|
778 |
|
779 |
ret = load_image(buf, phys_ram_base + vga_bios_offset); |
780 |
if (ret != vga_bios_size) {
|
781 |
vga_bios_error:
|
782 |
fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
|
783 |
exit(1);
|
784 |
} |
785 |
|
786 |
/* setup basic memory access */
|
787 |
cpu_register_physical_memory(0xc0000, 0x10000, |
788 |
vga_bios_offset | IO_MEM_ROM); |
789 |
|
790 |
/* map the last 128KB of the BIOS in ISA space */
|
791 |
isa_bios_size = bios_size; |
792 |
if (isa_bios_size > (128 * 1024)) |
793 |
isa_bios_size = 128 * 1024; |
794 |
cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
795 |
IO_MEM_UNASSIGNED); |
796 |
cpu_register_physical_memory(0x100000 - isa_bios_size,
|
797 |
isa_bios_size, |
798 |
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
799 |
|
800 |
{ |
801 |
ram_addr_t option_rom_offset; |
802 |
int size, offset;
|
803 |
|
804 |
offset = 0;
|
805 |
for (i = 0; i < nb_option_roms; i++) { |
806 |
size = get_image_size(option_rom[i]); |
807 |
if (size < 0) { |
808 |
fprintf(stderr, "Could not load option rom '%s'\n",
|
809 |
option_rom[i]); |
810 |
exit(1);
|
811 |
} |
812 |
if (size > (0x10000 - offset)) |
813 |
goto option_rom_error;
|
814 |
option_rom_offset = qemu_ram_alloc(size); |
815 |
ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); |
816 |
if (ret != size) {
|
817 |
option_rom_error:
|
818 |
fprintf(stderr, "Too many option ROMS\n");
|
819 |
exit(1);
|
820 |
} |
821 |
size = (size + 4095) & ~4095; |
822 |
cpu_register_physical_memory(0xd0000 + offset,
|
823 |
size, option_rom_offset | IO_MEM_ROM); |
824 |
offset += size; |
825 |
} |
826 |
} |
827 |
|
828 |
/* map all the bios at the top of memory */
|
829 |
cpu_register_physical_memory((uint32_t)(-bios_size), |
830 |
bios_size, bios_offset | IO_MEM_ROM); |
831 |
|
832 |
bochs_bios_init(); |
833 |
|
834 |
if (linux_boot)
|
835 |
load_linux(kernel_filename, initrd_filename, kernel_cmdline); |
836 |
|
837 |
cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
|
838 |
i8259 = i8259_init(cpu_irq[0]);
|
839 |
ferr_irq = i8259[13];
|
840 |
|
841 |
if (pci_enabled) {
|
842 |
pci_bus = i440fx_init(&i440fx_state, i8259); |
843 |
piix3_devfn = piix3_init(pci_bus, -1);
|
844 |
} else {
|
845 |
pci_bus = NULL;
|
846 |
} |
847 |
|
848 |
/* init basic PC hardware */
|
849 |
register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
850 |
|
851 |
register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
852 |
|
853 |
if (cirrus_vga_enabled) {
|
854 |
if (pci_enabled) {
|
855 |
pci_cirrus_vga_init(pci_bus, |
856 |
ds, phys_ram_base + vga_ram_addr, |
857 |
vga_ram_addr, vga_ram_size); |
858 |
} else {
|
859 |
isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
860 |
vga_ram_addr, vga_ram_size); |
861 |
} |
862 |
} else if (vmsvga_enabled) { |
863 |
if (pci_enabled)
|
864 |
pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size, |
865 |
ram_size, vga_ram_size); |
866 |
else
|
867 |
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
868 |
} else {
|
869 |
if (pci_enabled) {
|
870 |
pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
871 |
vga_ram_addr, vga_ram_size, 0, 0); |
872 |
} else {
|
873 |
isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
874 |
vga_ram_addr, vga_ram_size); |
875 |
} |
876 |
} |
877 |
|
878 |
rtc_state = rtc_init(0x70, i8259[8]); |
879 |
|
880 |
register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
881 |
register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
882 |
|
883 |
if (pci_enabled) {
|
884 |
ioapic = ioapic_init(); |
885 |
} |
886 |
pit = pit_init(0x40, i8259[0]); |
887 |
pcspk_init(pit); |
888 |
if (pci_enabled) {
|
889 |
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
890 |
} |
891 |
|
892 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
893 |
if (serial_hds[i]) {
|
894 |
serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]); |
895 |
} |
896 |
} |
897 |
|
898 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
899 |
if (parallel_hds[i]) {
|
900 |
parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
901 |
parallel_hds[i]); |
902 |
} |
903 |
} |
904 |
|
905 |
for(i = 0; i < nb_nics; i++) { |
906 |
nd = &nd_table[i]; |
907 |
if (!nd->model) {
|
908 |
if (pci_enabled) {
|
909 |
nd->model = "ne2k_pci";
|
910 |
} else {
|
911 |
nd->model = "ne2k_isa";
|
912 |
} |
913 |
} |
914 |
if (strcmp(nd->model, "ne2k_isa") == 0) { |
915 |
pc_init_ne2k_isa(nd, i8259); |
916 |
} else if (pci_enabled) { |
917 |
if (strcmp(nd->model, "?") == 0) |
918 |
fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
919 |
pci_nic_init(pci_bus, nd, -1);
|
920 |
} else if (strcmp(nd->model, "?") == 0) { |
921 |
fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
922 |
exit(1);
|
923 |
} else {
|
924 |
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
925 |
exit(1);
|
926 |
} |
927 |
} |
928 |
|
929 |
if (pci_enabled) {
|
930 |
pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1, i8259);
|
931 |
} else {
|
932 |
for(i = 0; i < 2; i++) { |
933 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
934 |
bs_table[2 * i], bs_table[2 * i + 1]); |
935 |
} |
936 |
} |
937 |
|
938 |
i8042_init(i8259[1], i8259[12], 0x60); |
939 |
DMA_init(0);
|
940 |
#ifdef HAS_AUDIO
|
941 |
audio_init(pci_enabled ? pci_bus : NULL, i8259);
|
942 |
#endif
|
943 |
|
944 |
floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd_table); |
945 |
|
946 |
cmos_init(ram_size, boot_device, bs_table); |
947 |
|
948 |
if (pci_enabled && usb_enabled) {
|
949 |
usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
|
950 |
} |
951 |
|
952 |
if (pci_enabled && acpi_enabled) {
|
953 |
uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
954 |
i2c_bus *smbus; |
955 |
|
956 |
/* TODO: Populate SPD eeprom data. */
|
957 |
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100); |
958 |
for (i = 0; i < 8; i++) { |
959 |
smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
960 |
} |
961 |
} |
962 |
|
963 |
if (i440fx_state) {
|
964 |
i440fx_init_memory_mappings(i440fx_state); |
965 |
} |
966 |
#if 0
|
967 |
/* ??? Need to figure out some way for the user to
|
968 |
specify SCSI devices. */
|
969 |
if (pci_enabled) {
|
970 |
void *scsi;
|
971 |
BlockDriverState *bdrv;
|
972 |
|
973 |
scsi = lsi_scsi_init(pci_bus, -1);
|
974 |
bdrv = bdrv_new("scsidisk");
|
975 |
bdrv_open(bdrv, "scsi_disk.img", 0);
|
976 |
lsi_scsi_attach(scsi, bdrv, -1);
|
977 |
bdrv = bdrv_new("scsicd");
|
978 |
bdrv_open(bdrv, "scsi_cd.iso", 0);
|
979 |
bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
|
980 |
lsi_scsi_attach(scsi, bdrv, -1);
|
981 |
}
|
982 |
#endif
|
983 |
} |
984 |
|
985 |
static void pc_init_pci(int ram_size, int vga_ram_size, const char *boot_device, |
986 |
DisplayState *ds, const char **fd_filename, |
987 |
int snapshot,
|
988 |
const char *kernel_filename, |
989 |
const char *kernel_cmdline, |
990 |
const char *initrd_filename, |
991 |
const char *cpu_model) |
992 |
{ |
993 |
pc_init1(ram_size, vga_ram_size, boot_device, |
994 |
ds, fd_filename, snapshot, |
995 |
kernel_filename, kernel_cmdline, |
996 |
initrd_filename, 1, cpu_model);
|
997 |
} |
998 |
|
999 |
static void pc_init_isa(int ram_size, int vga_ram_size, const char *boot_device, |
1000 |
DisplayState *ds, const char **fd_filename, |
1001 |
int snapshot,
|
1002 |
const char *kernel_filename, |
1003 |
const char *kernel_cmdline, |
1004 |
const char *initrd_filename, |
1005 |
const char *cpu_model) |
1006 |
{ |
1007 |
pc_init1(ram_size, vga_ram_size, boot_device, |
1008 |
ds, fd_filename, snapshot, |
1009 |
kernel_filename, kernel_cmdline, |
1010 |
initrd_filename, 0, cpu_model);
|
1011 |
} |
1012 |
|
1013 |
QEMUMachine pc_machine = { |
1014 |
"pc",
|
1015 |
"Standard PC",
|
1016 |
pc_init_pci, |
1017 |
}; |
1018 |
|
1019 |
QEMUMachine isapc_machine = { |
1020 |
"isapc",
|
1021 |
"ISA-only PC",
|
1022 |
pc_init_isa, |
1023 |
}; |