Revision 88eeee0a
b/hw/flash.h | ||
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1 | 1 |
/* NOR flash devices */ |
2 | 2 |
typedef struct pflash_t pflash_t; |
3 | 3 |
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4 |
pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, |
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BlockDriverState *bs, |
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uint32_t sector_len, int nb_blocs, int width, |
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uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3); |
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/* pflash_cfi01.c */ |
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pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, |
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BlockDriverState *bs, |
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uint32_t sector_len, int nb_blocs, int width, |
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uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3); |
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11 |
/* pflash_cfi02.c */ |
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pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, |
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BlockDriverState *bs, |
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uint32_t sector_len, int nb_blocs, int width, |
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uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3); |
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9 | 17 |
|
10 | 18 |
/* nand.c */ |
11 | 19 |
struct nand_flash_s; |
... | ... | |
37 | 45 |
void ecc_reset(struct ecc_state_s *s); |
38 | 46 |
void ecc_put(QEMUFile *f, struct ecc_state_s *s); |
39 | 47 |
void ecc_get(QEMUFile *f, struct ecc_state_s *s); |
40 |
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b/hw/gumstix.c | ||
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67 | 67 |
exit(1); |
68 | 68 |
} |
69 | 69 |
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if (!pflash_register(0x00000000, qemu_ram_alloc(connex_rom), |
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if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(connex_rom),
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|
71 | 71 |
drives_table[index].bdrv, sector_len, connex_rom / sector_len, |
72 | 72 |
2, 0, 0, 0, 0)) { |
73 | 73 |
fprintf(stderr, "qemu: Error registering flash memory.\n"); |
... | ... | |
107 | 107 |
exit(1); |
108 | 108 |
} |
109 | 109 |
|
110 |
if (!pflash_register(0x00000000, qemu_ram_alloc(verdex_rom), |
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if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(verdex_rom),
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111 | 111 |
drives_table[index].bdrv, sector_len, verdex_rom / sector_len, |
112 | 112 |
2, 0, 0, 0, 0)) { |
113 | 113 |
fprintf(stderr, "qemu: Error registering flash memory.\n"); |
b/hw/mainstone.c | ||
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55 | 55 |
"'pflash' parameter\n"); |
56 | 56 |
exit(1); |
57 | 57 |
} |
58 |
if (!pflash_register(MST_FLASH_0, mainstone_ram + PXA2XX_INTERNAL_SIZE, |
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if (!pflash_cfi01_register(MST_FLASH_0, |
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mainstone_ram + PXA2XX_INTERNAL_SIZE, |
|
59 | 60 |
drives_table[index].bdrv, |
60 | 61 |
256 * 1024, 128, 4, 0, 0, 0, 0)) { |
61 | 62 |
fprintf(stderr, "qemu: Error registering flash memory.\n"); |
... | ... | |
68 | 69 |
"'pflash' parameter\n"); |
69 | 70 |
exit(1); |
70 | 71 |
} |
71 |
if (!pflash_register(MST_FLASH_1, mainstone_ram + PXA2XX_INTERNAL_SIZE, |
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if (!pflash_cfi01_register(MST_FLASH_1, |
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mainstone_ram + PXA2XX_INTERNAL_SIZE, |
|
72 | 74 |
drives_table[index].bdrv, |
73 | 75 |
256 * 1024, 128, 4, 0, 0, 0, 0)) { |
74 | 76 |
fprintf(stderr, "qemu: Error registering flash memory.\n"); |
b/hw/pflash_cfi01.c | ||
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483 | 483 |
return ret; |
484 | 484 |
} |
485 | 485 |
|
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pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off,
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BlockDriverState *bs,
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target_ulong sector_len, int nb_blocs, int width,
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uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3) |
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pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
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BlockDriverState *bs, target_ulong sector_len,
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int nb_blocs, int width,
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uint16_t id0, uint16_t id1,
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uint16_t id2, uint16_t id3)
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491 | 491 |
{ |
492 | 492 |
pflash_t *pfl; |
493 | 493 |
target_long total_len; |
b/hw/pflash_cfi02.c | ||
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524 | 524 |
return ret; |
525 | 525 |
} |
526 | 526 |
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pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off,
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528 |
BlockDriverState *bs,
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529 |
uint32_t sector_len, int nb_blocs, int width,
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530 |
uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3) |
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pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
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BlockDriverState *bs, target_ulong sector_len,
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int nb_blocs, int width,
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uint16_t id0, uint16_t id1,
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uint16_t id2, uint16_t id3)
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532 | 532 |
{ |
533 | 533 |
pflash_t *pfl; |
534 | 534 |
int32_t total_len; |
b/hw/ppc405_boards.c | ||
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234 | 234 |
fl_idx, bios_size, bios_offset, -bios_size, |
235 | 235 |
bdrv_get_device_name(drives_table[index].bdrv), fl_sectors); |
236 | 236 |
#endif |
237 |
pflash_register((uint32_t)(-bios_size), bios_offset, |
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drives_table[index].bdrv, 65536, fl_sectors, 2, |
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0x0001, 0x22DA, 0x0000, 0x0000); |
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pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
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drives_table[index].bdrv, 65536, fl_sectors, 2,
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0x0001, 0x22DA, 0x0000, 0x0000);
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240 | 240 |
fl_idx++; |
241 | 241 |
} else |
242 | 242 |
#endif |
... | ... | |
551 | 551 |
fl_idx, bios_size, bios_offset, -bios_size, |
552 | 552 |
bdrv_get_device_name(drives_table[index].bdrv), fl_sectors); |
553 | 553 |
#endif |
554 |
pflash_register((uint32_t)(-bios_size), bios_offset, |
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drives_table[index].bdrv, 65536, fl_sectors, 4, |
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0x0001, 0x22DA, 0x0000, 0x0000); |
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pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
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555 |
drives_table[index].bdrv, 65536, fl_sectors, 4,
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556 |
0x0001, 0x22DA, 0x0000, 0x0000);
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557 | 557 |
fl_idx++; |
558 | 558 |
} else |
559 | 559 |
#endif |
... | ... | |
587 | 587 |
fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000, |
588 | 588 |
bdrv_get_device_name(drives_table[index].bdrv)); |
589 | 589 |
#endif |
590 |
pflash_register(0xfc000000, bios_offset, drives_table[index].bdrv,
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65536, fl_sectors, 4, |
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0x0001, 0x22DA, 0x0000, 0x0000); |
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pflash_cfi02_register(0xfc000000, bios_offset,
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drives_table[index].bdrv, 65536, fl_sectors, 4,
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0x0001, 0x22DA, 0x0000, 0x0000);
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593 | 593 |
fl_idx++; |
594 | 594 |
} |
595 | 595 |
/* Register CLPD & LCD display */ |
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