Revision 89e8b13c hw/pci.c
| b/hw/pci.c | ||
|---|---|---|
| 467 | 467 |
|
| 468 | 468 |
if (size & (size-1)) {
|
| 469 | 469 |
fprintf(stderr, "ERROR: PCI region size must be pow2 " |
| 470 |
"type=0x%x, size=0x%x\n", type, size);
|
|
| 470 |
"type=0x%x, size=0x%"FMT_PCIBUS"\n", type, size);
|
|
| 471 | 471 |
exit(1); |
| 472 | 472 |
} |
| 473 | 473 |
|
| ... | ... | |
| 484 | 484 |
wmask |= PCI_ROM_ADDRESS_ENABLE; |
| 485 | 485 |
} |
| 486 | 486 |
pci_set_long(pci_dev->config + addr, type); |
| 487 |
pci_set_long(pci_dev->wmask + addr, wmask); |
|
| 487 |
pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff);
|
|
| 488 | 488 |
pci_set_long(pci_dev->cmask + addr, 0xffffffff); |
| 489 | 489 |
} |
| 490 | 490 |
|
| ... | ... | |
| 762 | 762 |
if (r->size != 0) {
|
| 763 | 763 |
monitor_printf(mon, " BAR%d: ", i); |
| 764 | 764 |
if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
|
| 765 |
monitor_printf(mon, "I/O at 0x%04x [0x%04x].\n", |
|
| 765 |
monitor_printf(mon, "I/O at 0x%04"FMT_PCIBUS |
|
| 766 |
" [0x%04"FMT_PCIBUS"].\n", |
|
| 766 | 767 |
r->addr, r->addr + r->size - 1); |
| 767 | 768 |
} else {
|
| 768 |
monitor_printf(mon, "32 bit memory at 0x%08x [0x%08x].\n", |
|
| 769 |
monitor_printf(mon, "32 bit memory at 0x%08"FMT_PCIBUS |
|
| 770 |
" [0x%08"FMT_PCIBUS"].\n", |
|
| 769 | 771 |
r->addr, r->addr + r->size - 1); |
| 770 | 772 |
} |
| 771 | 773 |
} |
| ... | ... | |
| 1124 | 1126 |
r = &d->io_regions[i]; |
| 1125 | 1127 |
if (!r->size) |
| 1126 | 1128 |
continue; |
| 1127 |
monitor_printf(mon, "%*sbar %d: %s at 0x%x [0x%x]\n", indent, "", |
|
| 1129 |
monitor_printf(mon, "%*sbar %d: %s at 0x%"FMT_PCIBUS |
|
| 1130 |
" [0x%"FMT_PCIBUS"]\n", |
|
| 1131 |
indent, "", |
|
| 1128 | 1132 |
i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem", |
| 1129 | 1133 |
r->addr, r->addr + r->size - 1); |
| 1130 | 1134 |
} |
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