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root / target-arm @ 8cfd0495

Name Size
Makefile.objs 223 Bytes
arm-semi.c 17.2 kB
cpu-qom.h 4.9 kB
cpu.c 29.5 kB
cpu.h 30 kB
gdbstub.c 2.8 kB
helper.c 129.2 kB
helper.h 17 kB
iwmmxt_helper.c 24.8 kB
kvm-stub.c 437 Bytes
kvm.c 18.4 kB
kvm_arm.h 2 kB
machine.c 7.9 kB
neon_helper.c 52.8 kB
op_addsub.h 1.8 kB
op_helper.c 8.9 kB
translate.c 355.2 kB

Latest revisions

# Date Author Comment
8cfd0495 09/02/2013 07:08 pm Richard Henderson

tcg: Change tcg_gen_exit_tb argument to uintptr_t

And update all users.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>

bc72ad67 08/22/2013 08:14 pm Alex Bligh

aio / timers: Switch entire codebase to the new timer API

This is an autogenerated patch using scripts/switch-timer-api.

Switch the entire code base to using the new timer API.

Note this patch may introduce some line length issues.

Signed-off-by: Alex Bligh <>...

22d9e1a9 08/20/2013 04:54 pm Peter Maydell

target-arm: Allow raw_read() and raw_write() to handle 64 bit regs

Extend the raw_read() and raw_write() helper accessors so that
they can be used for 64 bit registers as well as 32 bit registers.

Signed-off-by: Peter Maydell <>
Tested-by: Laurent Desnogues <>...

2452731c 08/20/2013 04:54 pm Peter Maydell

target-arm: Support coprocessor registers which do I/O

Add an ARM_CP_IO flag which an ARMCPRegInfo definition can use to
indicate that the register's implementation does I/O and thus
its accesses need to be surrounded by gen_io_start()/gen_io_end()
in order for icount to work. Most notably, cp registers which...

55d284af 08/20/2013 04:54 pm Peter Maydell

target-arm: Implement the generic timer

The ARMv7 architecture specifies a 'generic timer' which is implemented
via cp15 registers. Newer kernels will prefer to use this rather than
a devboard-level timer. Implement the generic timer for TCG; for KVM
we will already use the hardware's virtualized timer for this....

3f1beaca 08/20/2013 04:54 pm Peter Maydell

target-arm: Implement 'int' loglevel

The 'int' loglevel for recording interrupts and exceptions
requires support in the target-specific code. Implement
it for ARM. This improves debug logging in some situations
that were otherwise pretty opaque, such as when we fault...

7c1840b6 08/20/2013 04:54 pm Peter Maydell

target-arm: Make IRQ and FIQ gpio lines on the CPU object

Now that ARMCPU is a subclass of DeviceState, we can make the
CPU's inbound IRQ and FIQ lines be simply gpio lines, which
means we can remove the odd arm_pic shim.

We retain the arm_pic_init_cpu() function as a backwards...

14a10fc3 07/29/2013 04:29 pm Andreas Färber

cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"

Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code.
This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed".

The reason for the failure is that CPUClass::kvm_fd is not yet...

dfc6f865 07/27/2013 10:22 am Stefan Weil

misc: Use g_assert_not_reached for code which is expected to be unreachable

The macro g_assert_not_reached is a better self documenting replacement
for assert(0) or assert(false).

Signed-off-by: Stefan Weil <>
Signed-off-by: Michael Tokarev <>

5b24c641 07/27/2013 01:04 am Andreas Färber

cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML

Replace the GDB_CORE_XML define in gdbstub.c with a CPUClass field.
Use first_cpu for qSupported and qXfer:features:read: for now.
Add a stub for xml_builtin.

Signed-off-by: Andreas Färber <>

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