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# Date Author Comment
a9751609 03/26/2010 10:28 pm Richard Henderson

tcg: Name the opcode enumeration.

Give the enumeration formed from tcg-opc.h a name: TCGOpcode.
Use that enumeration type instead of "int" whereever appropriate.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9e97d8e9 03/20/2010 01:27 pm Aurelien Jarno

tcg/arm: don't save/restore r7 in prologue/epilogue

There is no need to save r7, it is used to store the address
of the env structure and is not modified by GCC.

Signed-off-by: Aurelien Jarno <>

26c5d372 03/20/2010 01:10 pm Aurelien Jarno

tcg/arm: fix load/store definitions for 32-bit targets

Signed-off-by: Aurelien Jarno <>

2b71cd72 03/14/2010 11:04 pm Aurelien Jarno

tcg/arm: use helpers for divu/remu

Signed-off-by: Aurelien Jarno <>

932234f6 03/13/2010 12:46 pm Aurelien Jarno

tcg/arm: implement andc op

Signed-off-by: Aurelien Jarno <>

4e17eae9 03/13/2010 12:44 pm Aurelien Jarno

tcg/arm: correctly save/restore registers in prologue/epilogue

Since commit 6113d6d3169393c323ac4c82d756a850145a5e7a QEMU crashes
on ARM hosts. This is not a bug of this commit, but a latent bug
revealed by this commit.

The TCG code is called through a procedure call using the prologue...

20cb400d 03/12/2010 08:34 pm Paul Brook

Remove TLB from userspace

Remove TLB from userspace CPU structure.

Signed-off-by: Paul Brook <>

023e77f8 03/02/2010 11:31 pm Aurelien Jarno

tcg/arm: accept immediate arguments for brcond/setcond

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

b525f0a9 03/02/2010 11:26 pm Andrzej Zaborowski

Add a missing break

e0404769 03/02/2010 11:19 pm Aurelien Jarno

tcg/arm: implement setcond2

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

f72a6cd7 03/02/2010 11:17 pm Aurelien Jarno

tcg/arm: implement setcond

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

6b658613 03/02/2010 09:19 pm Aurelien Jarno

tcg/arm: fix div2/divu2

When restoring register values, increase the stack register for skipped
values.

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

7990496d 09/26/2009 10:29 pm Laurent Desnogues

ARM back-end: Use sxt[bh] instructions for ext{8, 6}s

This patch uses sxtb for ext8s_i32 and sxth for ext16s_i32 in ARM back-end.

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>

d89c682f 09/25/2009 05:31 pm Stefan Weil

Suppress some variants of English in comments

Replace surpress, supress by suppress.

Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

4e6f6d4c 08/25/2009 02:14 am Laurent Desnogues

ARM back-end: Fix encode_imm

the encode_imm function in tcg/arm/tcg-target.c lacks shift declaration.

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

94953e6d 08/22/2009 03:29 pm Laurent Desnogues

ARM back-end: Handle all possible immediates for ALU ops

this patch handles all possible constants for immediate operand of ALU ops.
I'm not very satisfied by the implementation.

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

f878d2d2 08/22/2009 02:55 pm Laurent Desnogues

ARM back-end: Add TCG not

this patch:

- implements TCG not.

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

e2542fe2 07/27/2009 10:09 pm Juan Quintela

rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

cb4e581f 07/18/2009 03:20 pm Laurent Desnogues

this patch improves the ARM back-end in the following way:

- use movw/movt to load immediate values for ARMv7-A
- implement add/sub/and/or/xor with immediate (only 8-bit)

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

379f6698 07/17/2009 03:12 pm Paul Brook

Userspace guest address offsetting

Re-implement GUEST_BASE support.
Offset guest ddress space by default if the guest binary contains
regions below the host mmap_min_addr.
Implement support for i386, x86-64 and arm hosts.

Signed-off-by: Riku Voipio <>...

2d69f359 07/17/2009 01:21 pm Paul Brook

ARM host fixes

Minor TCG cleanups and warning fixes for ARM hosts.

Signed-off-by: Paul Brook <>

419bafa5 03/10/2009 11:43 pm aurel32

tcg-arm: fix qemu_ld64

Emulating fldl on arm doesn't seem to work too well. It's the way
qemu_ld64 is translated to arm instructions.

tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, 0);
tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, 4);...
aef3a282 12/08/2008 01:35 am balrog

Fix 64-bit targets compilation on ARM host.

Only fix compilation, probably doesn't run.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5947 c046a42c-6fe2-441c-8c8c-71466251a162

0c9c3a9e 12/01/2008 01:57 pm balrog

arm: Don't potentially overwrite input registers in add2, sub2.

According to malc TCG will often genereate an add2/sub2/mul2 with low
half of the output in the same register as high half of one of the
inputs, so account for that.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5847 c046a42c-6fe2-441c-8c8c-71466251a162

fe33867b 12/01/2008 04:17 am balrog

Don't rely on ARM tcg_out_goto() generating just a single insn.

Otherwise when tb_exit generates a jump beyond the pc-relative range,
tcg_out_goto() spans two/three instructions and we load the tb return
value from a wrong address. This is #ifdefed out currently because...

d4a9eb1f 10/05/2008 12:59 pm blueswir1

Add some missing static and const qualifiers, reg_names only used if NDEBUG set

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162

79383c9c 08/30/2008 12:51 pm blueswir1

Fix some warnings that would be generated by gcc -Wredundant-decls

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162

9b7b85d2 05/25/2008 03:36 am pbrook

Fix off-by-one unwinding error.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162

d0660ed4 05/25/2008 02:12 am balrog

Relax a constraint for qemu_ld64 on ARM host.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4567 c046a42c-6fe2-441c-8c8c-71466251a162

eae6ce52 05/25/2008 01:56 am balrog

Fix a deadly typo, correct comments.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4566 c046a42c-6fe2-441c-8c8c-71466251a162

3979144c 05/24/2008 11:07 pm pbrook

Fix ARM host TLB.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4564 c046a42c-6fe2-441c-8c8c-71466251a162

91a3c1b0 05/23/2008 09:51 pm balrog

Comment non-obvious calculation. Don't clobber r3 in qemu_st64.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4548 c046a42c-6fe2-441c-8c8c-71466251a162

e936243a 05/23/2008 09:50 pm balrog

A branch insn must not overwrite the branch target before relocation.

When a branch to label is translated it generates a reloc that is filled in
when the label is translated. However, when handling an exception and
searching for the pc we abort the translation early and we sometimes...

225b4376 05/23/2008 03:55 pm balrog

Fix qemu_ld/st for mem_index > 0 on arm host.

offsetof(CPUState, tlb_table[mem_index][0].addr_read) with mem_index > 0
was larger than max immediate offset for ldr and str (12-bit) so insert an
additional insn to add the mem_index offset.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4542 c046a42c-6fe2-441c-8c8c-71466251a162

204c1674 05/20/2008 02:28 pm balrog

Fix 8-bit signed load/store and a typo.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4504 c046a42c-6fe2-441c-8c8c-71466251a162

650bbb36 05/20/2008 02:26 pm balrog

Implement neg_i32, clean-up.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4503 c046a42c-6fe2-441c-8c8c-71466251a162

811d4cf4 05/20/2008 02:59 am balrog

ARM host support for TCG targets.

Updated from previous version to use the tcg prologue/epilogue mechanism, may be slower than direct call.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4500 c046a42c-6fe2-441c-8c8c-71466251a162