Revision 8da3ff18 hw/musicpal.c
| b/hw/musicpal.c | ||
|---|---|---|
| 239 | 239 |
static const char audio_name[] = "mv88w8618"; |
| 240 | 240 |
|
| 241 | 241 |
typedef struct musicpal_audio_state {
|
| 242 |
uint32_t base; |
|
| 243 | 242 |
qemu_irq irq; |
| 244 | 243 |
uint32_t playback_mode; |
| 245 | 244 |
uint32_t status; |
| ... | ... | |
| 334 | 333 |
{
|
| 335 | 334 |
musicpal_audio_state *s = opaque; |
| 336 | 335 |
|
| 337 |
offset -= s->base; |
|
| 338 | 336 |
switch (offset) {
|
| 339 | 337 |
case MP_AUDIO_PLAYBACK_MODE: |
| 340 | 338 |
return s->playback_mode; |
| ... | ... | |
| 361 | 359 |
{
|
| 362 | 360 |
musicpal_audio_state *s = opaque; |
| 363 | 361 |
|
| 364 |
offset -= s->base; |
|
| 365 | 362 |
switch (offset) {
|
| 366 | 363 |
case MP_AUDIO_PLAYBACK_MODE: |
| 367 | 364 |
if (value & MP_AUDIO_PLAYBACK_EN && |
| ... | ... | |
| 448 | 445 |
s = qemu_mallocz(sizeof(musicpal_audio_state)); |
| 449 | 446 |
if (!s) |
| 450 | 447 |
return NULL; |
| 451 |
s->base = base; |
|
| 452 | 448 |
s->irq = irq; |
| 453 | 449 |
|
| 454 | 450 |
i2c = qemu_mallocz(sizeof(i2c_interface)); |
| ... | ... | |
| 549 | 545 |
} mv88w8618_rx_desc; |
| 550 | 546 |
|
| 551 | 547 |
typedef struct mv88w8618_eth_state {
|
| 552 |
uint32_t base; |
|
| 553 | 548 |
qemu_irq irq; |
| 554 | 549 |
uint32_t smir; |
| 555 | 550 |
uint32_t icr; |
| ... | ... | |
| 617 | 612 |
{
|
| 618 | 613 |
mv88w8618_eth_state *s = opaque; |
| 619 | 614 |
|
| 620 |
offset -= s->base; |
|
| 621 | 615 |
switch (offset) {
|
| 622 | 616 |
case MP_ETH_SMIR: |
| 623 | 617 |
if (s->smir & MP_ETH_SMIR_OPCODE) {
|
| ... | ... | |
| 660 | 654 |
{
|
| 661 | 655 |
mv88w8618_eth_state *s = opaque; |
| 662 | 656 |
|
| 663 |
offset -= s->base; |
|
| 664 | 657 |
switch (offset) {
|
| 665 | 658 |
case MP_ETH_SMIR: |
| 666 | 659 |
s->smir = value; |
| ... | ... | |
| 724 | 717 |
s = qemu_mallocz(sizeof(mv88w8618_eth_state)); |
| 725 | 718 |
if (!s) |
| 726 | 719 |
return; |
| 727 |
s->base = base; |
|
| 728 | 720 |
s->irq = irq; |
| 729 | 721 |
s->vc = qemu_new_vlan_client(nd->vlan, eth_receive, eth_can_receive, s); |
| 730 | 722 |
iomemtype = cpu_register_io_memory(0, mv88w8618_eth_readfn, |
| ... | ... | |
| 752 | 744 |
#define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */ |
| 753 | 745 |
|
| 754 | 746 |
typedef struct musicpal_lcd_state {
|
| 755 |
uint32_t base; |
|
| 756 | 747 |
uint32_t mode; |
| 757 | 748 |
uint32_t irqctrl; |
| 758 | 749 |
int page; |
| ... | ... | |
| 852 | 843 |
{
|
| 853 | 844 |
musicpal_lcd_state *s = opaque; |
| 854 | 845 |
|
| 855 |
offset -= s->base; |
|
| 856 | 846 |
switch (offset) {
|
| 857 | 847 |
case MP_LCD_IRQCTRL: |
| 858 | 848 |
return s->irqctrl; |
| ... | ... | |
| 867 | 857 |
{
|
| 868 | 858 |
musicpal_lcd_state *s = opaque; |
| 869 | 859 |
|
| 870 |
offset -= s->base; |
|
| 871 | 860 |
switch (offset) {
|
| 872 | 861 |
case MP_LCD_IRQCTRL: |
| 873 | 862 |
s->irqctrl = value; |
| ... | ... | |
| 922 | 911 |
s = qemu_mallocz(sizeof(musicpal_lcd_state)); |
| 923 | 912 |
if (!s) |
| 924 | 913 |
return; |
| 925 |
s->base = base; |
|
| 926 | 914 |
s->ds = ds; |
| 927 | 915 |
iomemtype = cpu_register_io_memory(0, musicpal_lcd_readfn, |
| 928 | 916 |
musicpal_lcd_writefn, s); |
| ... | ... | |
| 940 | 928 |
|
| 941 | 929 |
typedef struct mv88w8618_pic_state |
| 942 | 930 |
{
|
| 943 |
uint32_t base; |
|
| 944 | 931 |
uint32_t level; |
| 945 | 932 |
uint32_t enabled; |
| 946 | 933 |
qemu_irq parent_irq; |
| ... | ... | |
| 966 | 953 |
{
|
| 967 | 954 |
mv88w8618_pic_state *s = opaque; |
| 968 | 955 |
|
| 969 |
offset -= s->base; |
|
| 970 | 956 |
switch (offset) {
|
| 971 | 957 |
case MP_PIC_STATUS: |
| 972 | 958 |
return s->level & s->enabled; |
| ... | ... | |
| 981 | 967 |
{
|
| 982 | 968 |
mv88w8618_pic_state *s = opaque; |
| 983 | 969 |
|
| 984 |
offset -= s->base; |
|
| 985 | 970 |
switch (offset) {
|
| 986 | 971 |
case MP_PIC_ENABLE_SET: |
| 987 | 972 |
s->enabled |= value; |
| ... | ... | |
| 1025 | 1010 |
if (!s) |
| 1026 | 1011 |
return NULL; |
| 1027 | 1012 |
qi = qemu_allocate_irqs(mv88w8618_pic_set_irq, s, 32); |
| 1028 |
s->base = base; |
|
| 1029 | 1013 |
s->parent_irq = parent_irq; |
| 1030 | 1014 |
iomemtype = cpu_register_io_memory(0, mv88w8618_pic_readfn, |
| 1031 | 1015 |
mv88w8618_pic_writefn, s); |
| ... | ... | |
| 1059 | 1043 |
typedef struct mv88w8618_pit_state {
|
| 1060 | 1044 |
void *timer[4]; |
| 1061 | 1045 |
uint32_t control; |
| 1062 |
uint32_t base; |
|
| 1063 | 1046 |
} mv88w8618_pit_state; |
| 1064 | 1047 |
|
| 1065 | 1048 |
static void mv88w8618_timer_tick(void *opaque) |
| ... | ... | |
| 1089 | 1072 |
mv88w8618_pit_state *s = opaque; |
| 1090 | 1073 |
mv88w8618_timer_state *t; |
| 1091 | 1074 |
|
| 1092 |
offset -= s->base; |
|
| 1093 | 1075 |
switch (offset) {
|
| 1094 | 1076 |
case MP_PIT_TIMER1_VALUE ... MP_PIT_TIMER4_VALUE: |
| 1095 | 1077 |
t = s->timer[(offset-MP_PIT_TIMER1_VALUE) >> 2]; |
| ... | ... | |
| 1107 | 1089 |
mv88w8618_timer_state *t; |
| 1108 | 1090 |
int i; |
| 1109 | 1091 |
|
| 1110 |
offset -= s->base; |
|
| 1111 | 1092 |
switch (offset) {
|
| 1112 | 1093 |
case MP_PIT_TIMER1_LENGTH ... MP_PIT_TIMER4_LENGTH: |
| 1113 | 1094 |
t = s->timer[offset >> 2]; |
| ... | ... | |
| 1155 | 1136 |
if (!s) |
| 1156 | 1137 |
return; |
| 1157 | 1138 |
|
| 1158 |
s->base = base; |
|
| 1159 | 1139 |
/* Letting them all run at 1 MHz is likely just a pragmatic |
| 1160 | 1140 |
* simplification. */ |
| 1161 | 1141 |
s->timer[0] = mv88w8618_timer_init(1000000, pic[irq]); |
| ... | ... | |
| 1172 | 1152 |
#define MP_FLASHCFG_CFGR0 0x04 |
| 1173 | 1153 |
|
| 1174 | 1154 |
typedef struct mv88w8618_flashcfg_state {
|
| 1175 |
uint32_t base; |
|
| 1176 | 1155 |
uint32_t cfgr0; |
| 1177 | 1156 |
} mv88w8618_flashcfg_state; |
| 1178 | 1157 |
|
| ... | ... | |
| 1181 | 1160 |
{
|
| 1182 | 1161 |
mv88w8618_flashcfg_state *s = opaque; |
| 1183 | 1162 |
|
| 1184 |
offset -= s->base; |
|
| 1185 | 1163 |
switch (offset) {
|
| 1186 | 1164 |
case MP_FLASHCFG_CFGR0: |
| 1187 | 1165 |
return s->cfgr0; |
| ... | ... | |
| 1196 | 1174 |
{
|
| 1197 | 1175 |
mv88w8618_flashcfg_state *s = opaque; |
| 1198 | 1176 |
|
| 1199 |
offset -= s->base; |
|
| 1200 | 1177 |
switch (offset) {
|
| 1201 | 1178 |
case MP_FLASHCFG_CFGR0: |
| 1202 | 1179 |
s->cfgr0 = value; |
| ... | ... | |
| 1225 | 1202 |
if (!s) |
| 1226 | 1203 |
return; |
| 1227 | 1204 |
|
| 1228 |
s->base = base; |
|
| 1229 | 1205 |
s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */ |
| 1230 | 1206 |
iomemtype = cpu_register_io_memory(0, mv88w8618_flashcfg_readfn, |
| 1231 | 1207 |
mv88w8618_flashcfg_writefn, s); |
| ... | ... | |
| 1266 | 1242 |
|
| 1267 | 1243 |
static uint32_t musicpal_read(void *opaque, target_phys_addr_t offset) |
| 1268 | 1244 |
{
|
| 1269 |
offset -= 0x80000000; |
|
| 1270 | 1245 |
switch (offset) {
|
| 1271 | 1246 |
case MP_BOARD_REVISION: |
| 1272 | 1247 |
return 0x0031; |
| ... | ... | |
| 1307 | 1282 |
static void musicpal_write(void *opaque, target_phys_addr_t offset, |
| 1308 | 1283 |
uint32_t value) |
| 1309 | 1284 |
{
|
| 1310 |
offset -= 0x80000000; |
|
| 1311 | 1285 |
switch (offset) {
|
| 1312 | 1286 |
case MP_GPIO_OE_HI: /* used for LCD brightness control */ |
| 1313 | 1287 |
lcd_brightness = (lcd_brightness & MP_GPIO_LCD_BRIGHTNESS) | |
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