Revision 8da3ff18 hw/pxa2xx_lcd.c
| b/hw/pxa2xx_lcd.c | ||
|---|---|---|
| 17 | 17 |
typedef void (*drawfn)(uint32_t *, uint8_t *, const uint8_t *, int, int); |
| 18 | 18 |
|
| 19 | 19 |
struct pxa2xx_lcdc_s {
|
| 20 |
target_phys_addr_t base; |
|
| 21 | 20 |
qemu_irq irq; |
| 22 | 21 |
int irqlevel; |
| 23 | 22 |
|
| ... | ... | |
| 322 | 321 |
{
|
| 323 | 322 |
struct pxa2xx_lcdc_s *s = (struct pxa2xx_lcdc_s *) opaque; |
| 324 | 323 |
int ch; |
| 325 |
offset -= s->base; |
|
| 326 | 324 |
|
| 327 | 325 |
switch (offset) {
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| 328 | 326 |
case LCCR0: |
| ... | ... | |
| 418 | 416 |
{
|
| 419 | 417 |
struct pxa2xx_lcdc_s *s = (struct pxa2xx_lcdc_s *) opaque; |
| 420 | 418 |
int ch; |
| 421 |
offset -= s->base; |
|
| 422 | 419 |
|
| 423 | 420 |
switch (offset) {
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| 424 | 421 |
case LCCR0: |
| ... | ... | |
| 991 | 988 |
struct pxa2xx_lcdc_s *s; |
| 992 | 989 |
|
| 993 | 990 |
s = (struct pxa2xx_lcdc_s *) qemu_mallocz(sizeof(struct pxa2xx_lcdc_s)); |
| 994 |
s->base = base; |
|
| 995 | 991 |
s->invalidated = 1; |
| 996 | 992 |
s->irq = irq; |
| 997 | 993 |
s->ds = ds; |
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