Revision 8da3ff18 hw/sh_serial.c
| b/hw/sh_serial.c | ||
|---|---|---|
| 53 | 53 |
uint8_t rx_tail; |
| 54 | 54 |
uint8_t rx_head; |
| 55 | 55 |
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| 56 |
target_phys_addr_t base; |
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| 57 | 56 |
int freq; |
| 58 | 57 |
int feat; |
| 59 | 58 |
int flags; |
| ... | ... | |
| 82 | 81 |
unsigned char ch; |
| 83 | 82 |
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| 84 | 83 |
#ifdef DEBUG_SERIAL |
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printf("sh_serial: write base=0x%08lx offs=0x%02x val=0x%02x\n",
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(unsigned long) s->base, offs, val);
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printf("sh_serial: write offs=0x%02x val=0x%02x\n",
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offs, val); |
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| 87 | 86 |
#endif |
| 88 | 87 |
switch(offs) {
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| 89 | 88 |
case 0x00: /* SMR */ |
| ... | ... | |
| 278 | 277 |
#endif |
| 279 | 278 |
} |
| 280 | 279 |
#ifdef DEBUG_SERIAL |
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printf("sh_serial: read base=0x%08lx offs=0x%02x val=0x%x\n",
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(unsigned long) s->base, offs, ret);
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printf("sh_serial: read offs=0x%02x val=0x%x\n",
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offs, ret); |
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| 283 | 282 |
#endif |
| 284 | 283 |
|
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if (ret & ~((1 << 16) - 1)) {
|
| ... | ... | |
| 343 | 342 |
static uint32_t sh_serial_read (void *opaque, target_phys_addr_t addr) |
| 344 | 343 |
{
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sh_serial_state *s = opaque; |
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return sh_serial_ioport_read(s, addr - s->base);
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return sh_serial_ioport_read(s, addr); |
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| 347 | 346 |
} |
| 348 | 347 |
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| 349 | 348 |
static void sh_serial_write (void *opaque, |
| 350 | 349 |
target_phys_addr_t addr, uint32_t value) |
| 351 | 350 |
{
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sh_serial_state *s = opaque; |
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sh_serial_ioport_write(s, addr - s->base, value);
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|
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sh_serial_ioport_write(s, addr, value); |
|
| 354 | 353 |
} |
| 355 | 354 |
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| 356 | 355 |
static CPUReadMemoryFunc *sh_serial_readfn[] = {
|
| ... | ... | |
| 380 | 379 |
if (!s) |
| 381 | 380 |
return; |
| 382 | 381 |
|
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s->base = base; |
|
| 384 | 382 |
s->feat = feat; |
| 385 | 383 |
s->flags = SH_SERIAL_FLAG_TEND | SH_SERIAL_FLAG_TDE; |
| 386 | 384 |
s->rtrg = 1; |
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