Revision 8da3ff18 hw/sh_timer.c
b/hw/sh_timer.c | ||
---|---|---|
211 | 211 |
int level[3]; |
212 | 212 |
uint32_t tocr; |
213 | 213 |
uint32_t tstr; |
214 |
target_phys_addr_t base; |
|
215 | 214 |
int feat; |
216 | 215 |
} tmu012_state; |
217 | 216 |
|
... | ... | |
222 | 221 |
#ifdef DEBUG_TIMER |
223 | 222 |
printf("tmu012_read 0x%lx\n", (unsigned long) offset); |
224 | 223 |
#endif |
225 |
offset -= s->base; |
|
226 | 224 |
|
227 | 225 |
if (offset >= 0x20) { |
228 | 226 |
if (!(s->feat & TMU012_FEAT_3CHAN)) |
... | ... | |
256 | 254 |
#ifdef DEBUG_TIMER |
257 | 255 |
printf("tmu012_write 0x%lx 0x%08x\n", (unsigned long) offset, value); |
258 | 256 |
#endif |
259 |
offset -= s->base; |
|
260 | 257 |
|
261 | 258 |
if (offset >= 0x20) { |
262 | 259 |
if (!(s->feat & TMU012_FEAT_3CHAN)) |
... | ... | |
315 | 312 |
int timer_feat = (feat & TMU012_FEAT_EXTCLK) ? TIMER_FEAT_EXTCLK : 0; |
316 | 313 |
|
317 | 314 |
s = (tmu012_state *)qemu_mallocz(sizeof(tmu012_state)); |
318 |
s->base = base; |
|
319 | 315 |
s->feat = feat; |
320 | 316 |
s->timer[0] = sh_timer_init(freq, timer_feat, ch0_irq); |
321 | 317 |
s->timer[1] = sh_timer_init(freq, timer_feat, ch1_irq); |
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