Revision 8da3ff18 hw/usb-ohci.c
b/hw/usb-ohci.c | ||
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66 | 66 |
typedef struct { |
67 | 67 |
qemu_irq irq; |
68 | 68 |
enum ohci_type type; |
69 |
target_phys_addr_t mem_base; |
|
70 | 69 |
int mem; |
71 | 70 |
int num_ports; |
72 | 71 |
const char *name; |
... | ... | |
1362 | 1361 |
{ |
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OHCIState *ohci = ptr; |
1364 | 1363 |
|
1365 |
addr -= ohci->mem_base; |
|
1366 |
|
|
1367 | 1364 |
/* Only aligned reads are allowed on OHCI */ |
1368 | 1365 |
if (addr & 3) { |
1369 | 1366 |
fprintf(stderr, "usb-ohci: Mis-aligned read\n"); |
... | ... | |
1460 | 1457 |
{ |
1461 | 1458 |
OHCIState *ohci = ptr; |
1462 | 1459 |
|
1463 |
addr -= ohci->mem_base; |
|
1464 |
|
|
1465 | 1460 |
/* Only aligned reads are allowed on OHCI */ |
1466 | 1461 |
if (addr & 3) { |
1467 | 1462 |
fprintf(stderr, "usb-ohci: Mis-aligned write\n"); |
... | ... | |
1638 | 1633 |
uint32_t addr, uint32_t size, int type) |
1639 | 1634 |
{ |
1640 | 1635 |
OHCIPCIState *ohci = (OHCIPCIState *)pci_dev; |
1641 |
ohci->state.mem_base = addr; |
|
1642 | 1636 |
cpu_register_physical_memory(addr, size, ohci->state.mem); |
1643 | 1637 |
} |
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|
... | ... | |
1678 | 1672 |
|
1679 | 1673 |
usb_ohci_init(ohci, num_ports, devfn, irq, |
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OHCI_TYPE_PXA, "OHCI USB"); |
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ohci->mem_base = base; |
|
1682 | 1675 |
|
1683 |
cpu_register_physical_memory(ohci->mem_base, 0x1000, ohci->mem);
|
|
1676 |
cpu_register_physical_memory(base, 0x1000, ohci->mem); |
|
1684 | 1677 |
} |
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