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1
/*
2
 * QEMU Floppy disk emulator (Intel 82078)
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 *
4
 * Copyright (c) 2003, 2007 Jocelyn Mayer
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 * Copyright (c) 2008 Herv? Poussineau
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
25
/*
26
 * The controller is used in Sun4m systems in a slightly different
27
 * way. There are changes in DOR register and DMA is not available.
28
 */
29

    
30
#include "hw.h"
31
#include "fdc.h"
32
#include "block.h"
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#include "qemu-timer.h"
34
#include "isa.h"
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#include "sysbus.h"
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#include "qdev-addr.h"
37

    
38
/********************************************************/
39
/* debug Floppy devices */
40
//#define DEBUG_FLOPPY
41

    
42
#ifdef DEBUG_FLOPPY
43
#define FLOPPY_DPRINTF(fmt, ...)                                \
44
    do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define FLOPPY_DPRINTF(fmt, ...)
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#endif
48

    
49
#define FLOPPY_ERROR(fmt, ...)                                          \
50
    do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
51

    
52
/********************************************************/
53
/* Floppy drive emulation                               */
54

    
55
#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
56
#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
57

    
58
/* Will always be a fixed parameter for us */
59
#define FD_SECTOR_LEN          512
60
#define FD_SECTOR_SC           2   /* Sector size code */
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#define FD_RESET_SENSEI_COUNT  4   /* Number of sense interrupts on RESET */
62

    
63
/* Floppy disk drive emulation */
64
typedef enum FDiskType {
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    FDRIVE_DISK_288   = 0x01, /* 2.88 MB disk           */
66
    FDRIVE_DISK_144   = 0x02, /* 1.44 MB disk           */
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    FDRIVE_DISK_720   = 0x03, /* 720 kB disk            */
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    FDRIVE_DISK_USER  = 0x04, /* User defined geometry  */
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    FDRIVE_DISK_NONE  = 0x05, /* No disk                */
70
} FDiskType;
71

    
72
typedef enum FDriveType {
73
    FDRIVE_DRV_144  = 0x00,   /* 1.44 MB 3"5 drive      */
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    FDRIVE_DRV_288  = 0x01,   /* 2.88 MB 3"5 drive      */
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    FDRIVE_DRV_120  = 0x02,   /* 1.2  MB 5"25 drive     */
76
    FDRIVE_DRV_NONE = 0x03,   /* No drive connected     */
77
} FDriveType;
78

    
79
typedef enum FDiskFlags {
80
    FDISK_DBL_SIDES  = 0x01,
81
} FDiskFlags;
82

    
83
typedef struct FDrive {
84
    DriveInfo *dinfo;
85
    BlockDriverState *bs;
86
    /* Drive status */
87
    FDriveType drive;
88
    uint8_t perpendicular;    /* 2.88 MB access mode    */
89
    /* Position */
90
    uint8_t head;
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    uint8_t track;
92
    uint8_t sect;
93
    /* Media */
94
    FDiskFlags flags;
95
    uint8_t last_sect;        /* Nb sector per track    */
96
    uint8_t max_track;        /* Nb of tracks           */
97
    uint16_t bps;             /* Bytes per sector       */
98
    uint8_t ro;               /* Is read-only           */
99
} FDrive;
100

    
101
static void fd_init(FDrive *drv)
102
{
103
    /* Drive */
104
    drv->bs = drv->dinfo ? drv->dinfo->bdrv : NULL;
105
    drv->drive = FDRIVE_DRV_NONE;
106
    drv->perpendicular = 0;
107
    /* Disk */
108
    drv->last_sect = 0;
109
    drv->max_track = 0;
110
}
111

    
112
static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
113
                          uint8_t last_sect)
114
{
115
    return (((track * 2) + head) * last_sect) + sect - 1;
116
}
117

    
118
/* Returns current position, in sectors, for given drive */
119
static int fd_sector(FDrive *drv)
120
{
121
    return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect);
122
}
123

    
124
/* Seek to a new position:
125
 * returns 0 if already on right track
126
 * returns 1 if track changed
127
 * returns 2 if track is invalid
128
 * returns 3 if sector is invalid
129
 * returns 4 if seek is disabled
130
 */
131
static int fd_seek(FDrive *drv, uint8_t head, uint8_t track, uint8_t sect,
132
                   int enable_seek)
133
{
134
    uint32_t sector;
135
    int ret;
136

    
137
    if (track > drv->max_track ||
138
        (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
139
        FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
140
                       head, track, sect, 1,
141
                       (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
142
                       drv->max_track, drv->last_sect);
143
        return 2;
144
    }
145
    if (sect > drv->last_sect) {
146
        FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
147
                       head, track, sect, 1,
148
                       (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
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                       drv->max_track, drv->last_sect);
150
        return 3;
151
    }
152
    sector = fd_sector_calc(head, track, sect, drv->last_sect);
153
    ret = 0;
154
    if (sector != fd_sector(drv)) {
155
#if 0
156
        if (!enable_seek) {
157
            FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
158
                         head, track, sect, 1, drv->max_track, drv->last_sect);
159
            return 4;
160
        }
161
#endif
162
        drv->head = head;
163
        if (drv->track != track)
164
            ret = 1;
165
        drv->track = track;
166
        drv->sect = sect;
167
    }
168

    
169
    return ret;
170
}
171

    
172
/* Set drive back to track 0 */
173
static void fd_recalibrate(FDrive *drv)
174
{
175
    FLOPPY_DPRINTF("recalibrate\n");
176
    drv->head = 0;
177
    drv->track = 0;
178
    drv->sect = 1;
179
}
180

    
181
/* Recognize floppy formats */
182
typedef struct FDFormat {
183
    FDriveType drive;
184
    FDiskType  disk;
185
    uint8_t last_sect;
186
    uint8_t max_track;
187
    uint8_t max_head;
188
    const char *str;
189
} FDFormat;
190

    
191
static const FDFormat fd_formats[] = {
192
    /* First entry is default format */
193
    /* 1.44 MB 3"1/2 floppy disks */
194
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", },
195
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1,  "1.6 MB 3\"1/2", },
196
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", },
197
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", },
198
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", },
199
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", },
200
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", },
201
    { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", },
202
    /* 2.88 MB 3"1/2 floppy disks */
203
    { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", },
204
    { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", },
205
    { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1,  "3.2 MB 3\"1/2", },
206
    { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", },
207
    { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", },
208
    /* 720 kB 3"1/2 floppy disks */
209
    { FDRIVE_DRV_144, FDRIVE_DISK_720,  9, 80, 1,  "720 kB 3\"1/2", },
210
    { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1,  "800 kB 3\"1/2", },
211
    { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1,  "820 kB 3\"1/2", },
212
    { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1,  "830 kB 3\"1/2", },
213
    { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", },
214
    { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", },
215
    /* 1.2 MB 5"1/4 floppy disks */
216
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1,  "1.2 kB 5\"1/4", },
217
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", },
218
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", },
219
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", },
220
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1,  "1.6 MB 5\"1/4", },
221
    /* 720 kB 5"1/4 floppy disks */
222
    { FDRIVE_DRV_120, FDRIVE_DISK_288,  9, 80, 1,  "720 kB 5\"1/4", },
223
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1,  "880 kB 5\"1/4", },
224
    /* 360 kB 5"1/4 floppy disks */
225
    { FDRIVE_DRV_120, FDRIVE_DISK_288,  9, 40, 1,  "360 kB 5\"1/4", },
226
    { FDRIVE_DRV_120, FDRIVE_DISK_288,  9, 40, 0,  "180 kB 5\"1/4", },
227
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1,  "410 kB 5\"1/4", },
228
    { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1,  "420 kB 5\"1/4", },
229
    /* 320 kB 5"1/4 floppy disks */
230
    { FDRIVE_DRV_120, FDRIVE_DISK_288,  8, 40, 1,  "320 kB 5\"1/4", },
231
    { FDRIVE_DRV_120, FDRIVE_DISK_288,  8, 40, 0,  "160 kB 5\"1/4", },
232
    /* 360 kB must match 5"1/4 better than 3"1/2... */
233
    { FDRIVE_DRV_144, FDRIVE_DISK_720,  9, 80, 0,  "360 kB 3\"1/2", },
234
    /* end */
235
    { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, },
236
};
237

    
238
/* Revalidate a disk drive after a disk change */
239
static void fd_revalidate(FDrive *drv)
240
{
241
    const FDFormat *parse;
242
    uint64_t nb_sectors, size;
243
    int i, first_match, match;
244
    int nb_heads, max_track, last_sect, ro;
245

    
246
    FLOPPY_DPRINTF("revalidate\n");
247
    if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
248
        ro = bdrv_is_read_only(drv->bs);
249
        bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect);
250
        if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
251
            FLOPPY_DPRINTF("User defined disk (%d %d %d)",
252
                           nb_heads - 1, max_track, last_sect);
253
        } else {
254
            bdrv_get_geometry(drv->bs, &nb_sectors);
255
            match = -1;
256
            first_match = -1;
257
            for (i = 0;; i++) {
258
                parse = &fd_formats[i];
259
                if (parse->drive == FDRIVE_DRV_NONE)
260
                    break;
261
                if (drv->drive == parse->drive ||
262
                    drv->drive == FDRIVE_DRV_NONE) {
263
                    size = (parse->max_head + 1) * parse->max_track *
264
                        parse->last_sect;
265
                    if (nb_sectors == size) {
266
                        match = i;
267
                        break;
268
                    }
269
                    if (first_match == -1)
270
                        first_match = i;
271
                }
272
            }
273
            if (match == -1) {
274
                if (first_match == -1)
275
                    match = 1;
276
                else
277
                    match = first_match;
278
                parse = &fd_formats[match];
279
            }
280
            nb_heads = parse->max_head + 1;
281
            max_track = parse->max_track;
282
            last_sect = parse->last_sect;
283
            drv->drive = parse->drive;
284
            FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
285
                           nb_heads, max_track, last_sect, ro ? "ro" : "rw");
286
        }
287
        if (nb_heads == 1) {
288
            drv->flags &= ~FDISK_DBL_SIDES;
289
        } else {
290
            drv->flags |= FDISK_DBL_SIDES;
291
        }
292
        drv->max_track = max_track;
293
        drv->last_sect = last_sect;
294
        drv->ro = ro;
295
    } else {
296
        FLOPPY_DPRINTF("No disk in drive\n");
297
        drv->last_sect = 0;
298
        drv->max_track = 0;
299
        drv->flags &= ~FDISK_DBL_SIDES;
300
    }
301
}
302

    
303
/********************************************************/
304
/* Intel 82078 floppy disk controller emulation          */
305

    
306
static void fdctrl_reset(FDCtrl *fdctrl, int do_irq);
307
static void fdctrl_reset_fifo(FDCtrl *fdctrl);
308
static int fdctrl_transfer_handler (void *opaque, int nchan,
309
                                    int dma_pos, int dma_len);
310
static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0);
311

    
312
static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl);
313
static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl);
314
static uint32_t fdctrl_read_dor(FDCtrl *fdctrl);
315
static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value);
316
static uint32_t fdctrl_read_tape(FDCtrl *fdctrl);
317
static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value);
318
static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl);
319
static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value);
320
static uint32_t fdctrl_read_data(FDCtrl *fdctrl);
321
static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value);
322
static uint32_t fdctrl_read_dir(FDCtrl *fdctrl);
323

    
324
enum {
325
    FD_DIR_WRITE   = 0,
326
    FD_DIR_READ    = 1,
327
    FD_DIR_SCANE   = 2,
328
    FD_DIR_SCANL   = 3,
329
    FD_DIR_SCANH   = 4,
330
};
331

    
332
enum {
333
    FD_STATE_MULTI  = 0x01,        /* multi track flag */
334
    FD_STATE_FORMAT = 0x02,        /* format flag */
335
    FD_STATE_SEEK   = 0x04,        /* seek flag */
336
};
337

    
338
enum {
339
    FD_REG_SRA = 0x00,
340
    FD_REG_SRB = 0x01,
341
    FD_REG_DOR = 0x02,
342
    FD_REG_TDR = 0x03,
343
    FD_REG_MSR = 0x04,
344
    FD_REG_DSR = 0x04,
345
    FD_REG_FIFO = 0x05,
346
    FD_REG_DIR = 0x07,
347
};
348

    
349
enum {
350
    FD_CMD_READ_TRACK = 0x02,
351
    FD_CMD_SPECIFY = 0x03,
352
    FD_CMD_SENSE_DRIVE_STATUS = 0x04,
353
    FD_CMD_WRITE = 0x05,
354
    FD_CMD_READ = 0x06,
355
    FD_CMD_RECALIBRATE = 0x07,
356
    FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
357
    FD_CMD_WRITE_DELETED = 0x09,
358
    FD_CMD_READ_ID = 0x0a,
359
    FD_CMD_READ_DELETED = 0x0c,
360
    FD_CMD_FORMAT_TRACK = 0x0d,
361
    FD_CMD_DUMPREG = 0x0e,
362
    FD_CMD_SEEK = 0x0f,
363
    FD_CMD_VERSION = 0x10,
364
    FD_CMD_SCAN_EQUAL = 0x11,
365
    FD_CMD_PERPENDICULAR_MODE = 0x12,
366
    FD_CMD_CONFIGURE = 0x13,
367
    FD_CMD_LOCK = 0x14,
368
    FD_CMD_VERIFY = 0x16,
369
    FD_CMD_POWERDOWN_MODE = 0x17,
370
    FD_CMD_PART_ID = 0x18,
371
    FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
372
    FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
373
    FD_CMD_SAVE = 0x2c,
374
    FD_CMD_OPTION = 0x33,
375
    FD_CMD_RESTORE = 0x4c,
376
    FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
377
    FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
378
    FD_CMD_FORMAT_AND_WRITE = 0xcd,
379
    FD_CMD_RELATIVE_SEEK_IN = 0xcf,
380
};
381

    
382
enum {
383
    FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
384
    FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
385
    FD_CONFIG_POLL  = 0x10, /* Poll enabled */
386
    FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
387
    FD_CONFIG_EIS   = 0x40, /* No implied seeks */
388
};
389

    
390
enum {
391
    FD_SR0_EQPMT    = 0x10,
392
    FD_SR0_SEEK     = 0x20,
393
    FD_SR0_ABNTERM  = 0x40,
394
    FD_SR0_INVCMD   = 0x80,
395
    FD_SR0_RDYCHG   = 0xc0,
396
};
397

    
398
enum {
399
    FD_SR1_EC       = 0x80, /* End of cylinder */
400
};
401

    
402
enum {
403
    FD_SR2_SNS      = 0x04, /* Scan not satisfied */
404
    FD_SR2_SEH      = 0x08, /* Scan equal hit */
405
};
406

    
407
enum {
408
    FD_SRA_DIR      = 0x01,
409
    FD_SRA_nWP      = 0x02,
410
    FD_SRA_nINDX    = 0x04,
411
    FD_SRA_HDSEL    = 0x08,
412
    FD_SRA_nTRK0    = 0x10,
413
    FD_SRA_STEP     = 0x20,
414
    FD_SRA_nDRV2    = 0x40,
415
    FD_SRA_INTPEND  = 0x80,
416
};
417

    
418
enum {
419
    FD_SRB_MTR0     = 0x01,
420
    FD_SRB_MTR1     = 0x02,
421
    FD_SRB_WGATE    = 0x04,
422
    FD_SRB_RDATA    = 0x08,
423
    FD_SRB_WDATA    = 0x10,
424
    FD_SRB_DR0      = 0x20,
425
};
426

    
427
enum {
428
#if MAX_FD == 4
429
    FD_DOR_SELMASK  = 0x03,
430
#else
431
    FD_DOR_SELMASK  = 0x01,
432
#endif
433
    FD_DOR_nRESET   = 0x04,
434
    FD_DOR_DMAEN    = 0x08,
435
    FD_DOR_MOTEN0   = 0x10,
436
    FD_DOR_MOTEN1   = 0x20,
437
    FD_DOR_MOTEN2   = 0x40,
438
    FD_DOR_MOTEN3   = 0x80,
439
};
440

    
441
enum {
442
#if MAX_FD == 4
443
    FD_TDR_BOOTSEL  = 0x0c,
444
#else
445
    FD_TDR_BOOTSEL  = 0x04,
446
#endif
447
};
448

    
449
enum {
450
    FD_DSR_DRATEMASK= 0x03,
451
    FD_DSR_PWRDOWN  = 0x40,
452
    FD_DSR_SWRESET  = 0x80,
453
};
454

    
455
enum {
456
    FD_MSR_DRV0BUSY = 0x01,
457
    FD_MSR_DRV1BUSY = 0x02,
458
    FD_MSR_DRV2BUSY = 0x04,
459
    FD_MSR_DRV3BUSY = 0x08,
460
    FD_MSR_CMDBUSY  = 0x10,
461
    FD_MSR_NONDMA   = 0x20,
462
    FD_MSR_DIO      = 0x40,
463
    FD_MSR_RQM      = 0x80,
464
};
465

    
466
enum {
467
    FD_DIR_DSKCHG   = 0x80,
468
};
469

    
470
#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
471
#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
472
#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
473

    
474
struct FDCtrl {
475
    /* Controller's identification */
476
    uint8_t version;
477
    /* HW */
478
    qemu_irq irq;
479
    int dma_chann;
480
    /* Controller state */
481
    QEMUTimer *result_timer;
482
    uint8_t sra;
483
    uint8_t srb;
484
    uint8_t dor;
485
    uint8_t dor_vmstate; /* only used as temp during vmstate */
486
    uint8_t tdr;
487
    uint8_t dsr;
488
    uint8_t msr;
489
    uint8_t cur_drv;
490
    uint8_t status0;
491
    uint8_t status1;
492
    uint8_t status2;
493
    /* Command FIFO */
494
    uint8_t *fifo;
495
    int32_t fifo_size;
496
    uint32_t data_pos;
497
    uint32_t data_len;
498
    uint8_t data_state;
499
    uint8_t data_dir;
500
    uint8_t eot; /* last wanted sector */
501
    /* States kept only to be returned back */
502
    /* Timers state */
503
    uint8_t timer0;
504
    uint8_t timer1;
505
    /* precompensation */
506
    uint8_t precomp_trk;
507
    uint8_t config;
508
    uint8_t lock;
509
    /* Power down config (also with status regB access mode */
510
    uint8_t pwrd;
511
    /* Sun4m quirks? */
512
    int sun4m;
513
    /* Floppy drives */
514
    uint8_t num_floppies;
515
    FDrive drives[MAX_FD];
516
    int reset_sensei;
517
};
518

    
519
typedef struct FDCtrlSysBus {
520
    SysBusDevice busdev;
521
    struct FDCtrl state;
522
} FDCtrlSysBus;
523

    
524
typedef struct FDCtrlISABus {
525
    ISADevice busdev;
526
    struct FDCtrl state;
527
} FDCtrlISABus;
528

    
529
static uint32_t fdctrl_read (void *opaque, uint32_t reg)
530
{
531
    FDCtrl *fdctrl = opaque;
532
    uint32_t retval;
533

    
534
    switch (reg) {
535
    case FD_REG_SRA:
536
        retval = fdctrl_read_statusA(fdctrl);
537
        break;
538
    case FD_REG_SRB:
539
        retval = fdctrl_read_statusB(fdctrl);
540
        break;
541
    case FD_REG_DOR:
542
        retval = fdctrl_read_dor(fdctrl);
543
        break;
544
    case FD_REG_TDR:
545
        retval = fdctrl_read_tape(fdctrl);
546
        break;
547
    case FD_REG_MSR:
548
        retval = fdctrl_read_main_status(fdctrl);
549
        break;
550
    case FD_REG_FIFO:
551
        retval = fdctrl_read_data(fdctrl);
552
        break;
553
    case FD_REG_DIR:
554
        retval = fdctrl_read_dir(fdctrl);
555
        break;
556
    default:
557
        retval = (uint32_t)(-1);
558
        break;
559
    }
560
    FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
561

    
562
    return retval;
563
}
564

    
565
static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
566
{
567
    FDCtrl *fdctrl = opaque;
568

    
569
    FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
570

    
571
    switch (reg) {
572
    case FD_REG_DOR:
573
        fdctrl_write_dor(fdctrl, value);
574
        break;
575
    case FD_REG_TDR:
576
        fdctrl_write_tape(fdctrl, value);
577
        break;
578
    case FD_REG_DSR:
579
        fdctrl_write_rate(fdctrl, value);
580
        break;
581
    case FD_REG_FIFO:
582
        fdctrl_write_data(fdctrl, value);
583
        break;
584
    default:
585
        break;
586
    }
587
}
588

    
589
static uint32_t fdctrl_read_port (void *opaque, uint32_t reg)
590
{
591
    return fdctrl_read(opaque, reg & 7);
592
}
593

    
594
static void fdctrl_write_port (void *opaque, uint32_t reg, uint32_t value)
595
{
596
    fdctrl_write(opaque, reg & 7, value);
597
}
598

    
599
static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
600
{
601
    return fdctrl_read(opaque, (uint32_t)reg);
602
}
603

    
604
static void fdctrl_write_mem (void *opaque,
605
                              target_phys_addr_t reg, uint32_t value)
606
{
607
    fdctrl_write(opaque, (uint32_t)reg, value);
608
}
609

    
610
static CPUReadMemoryFunc * const fdctrl_mem_read[3] = {
611
    fdctrl_read_mem,
612
    fdctrl_read_mem,
613
    fdctrl_read_mem,
614
};
615

    
616
static CPUWriteMemoryFunc * const fdctrl_mem_write[3] = {
617
    fdctrl_write_mem,
618
    fdctrl_write_mem,
619
    fdctrl_write_mem,
620
};
621

    
622
static CPUReadMemoryFunc * const fdctrl_mem_read_strict[3] = {
623
    fdctrl_read_mem,
624
    NULL,
625
    NULL,
626
};
627

    
628
static CPUWriteMemoryFunc * const fdctrl_mem_write_strict[3] = {
629
    fdctrl_write_mem,
630
    NULL,
631
    NULL,
632
};
633

    
634
static const VMStateDescription vmstate_fdrive = {
635
    .name = "fdrive",
636
    .version_id = 1,
637
    .minimum_version_id = 1,
638
    .minimum_version_id_old = 1,
639
    .fields      = (VMStateField []) {
640
        VMSTATE_UINT8(head, FDrive),
641
        VMSTATE_UINT8(track, FDrive),
642
        VMSTATE_UINT8(sect, FDrive),
643
        VMSTATE_END_OF_LIST()
644
    }
645
};
646

    
647
static void fdc_pre_save(void *opaque)
648
{
649
    FDCtrl *s = opaque;
650

    
651
    s->dor_vmstate = s->dor | GET_CUR_DRV(s);
652
}
653

    
654
static int fdc_post_load(void *opaque, int version_id)
655
{
656
    FDCtrl *s = opaque;
657

    
658
    SET_CUR_DRV(s, s->dor_vmstate & FD_DOR_SELMASK);
659
    s->dor = s->dor_vmstate & ~FD_DOR_SELMASK;
660
    return 0;
661
}
662

    
663
static const VMStateDescription vmstate_fdc = {
664
    .name = "fdc",
665
    .version_id = 2,
666
    .minimum_version_id = 2,
667
    .minimum_version_id_old = 2,
668
    .pre_save = fdc_pre_save,
669
    .post_load = fdc_post_load,
670
    .fields      = (VMStateField []) {
671
        /* Controller State */
672
        VMSTATE_UINT8(sra, FDCtrl),
673
        VMSTATE_UINT8(srb, FDCtrl),
674
        VMSTATE_UINT8(dor_vmstate, FDCtrl),
675
        VMSTATE_UINT8(tdr, FDCtrl),
676
        VMSTATE_UINT8(dsr, FDCtrl),
677
        VMSTATE_UINT8(msr, FDCtrl),
678
        VMSTATE_UINT8(status0, FDCtrl),
679
        VMSTATE_UINT8(status1, FDCtrl),
680
        VMSTATE_UINT8(status2, FDCtrl),
681
        /* Command FIFO */
682
        VMSTATE_VARRAY_INT32(fifo, FDCtrl, fifo_size, 0, vmstate_info_uint8,
683
                             uint8_t),
684
        VMSTATE_UINT32(data_pos, FDCtrl),
685
        VMSTATE_UINT32(data_len, FDCtrl),
686
        VMSTATE_UINT8(data_state, FDCtrl),
687
        VMSTATE_UINT8(data_dir, FDCtrl),
688
        VMSTATE_UINT8(eot, FDCtrl),
689
        /* States kept only to be returned back */
690
        VMSTATE_UINT8(timer0, FDCtrl),
691
        VMSTATE_UINT8(timer1, FDCtrl),
692
        VMSTATE_UINT8(precomp_trk, FDCtrl),
693
        VMSTATE_UINT8(config, FDCtrl),
694
        VMSTATE_UINT8(lock, FDCtrl),
695
        VMSTATE_UINT8(pwrd, FDCtrl),
696
        VMSTATE_UINT8_EQUAL(num_floppies, FDCtrl),
697
        VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1,
698
                             vmstate_fdrive, FDrive),
699
        VMSTATE_END_OF_LIST()
700
    }
701
};
702

    
703
static void fdctrl_external_reset_sysbus(DeviceState *d)
704
{
705
    FDCtrlSysBus *sys = container_of(d, FDCtrlSysBus, busdev.qdev);
706
    FDCtrl *s = &sys->state;
707

    
708
    fdctrl_reset(s, 0);
709
}
710

    
711
static void fdctrl_external_reset_isa(DeviceState *d)
712
{
713
    FDCtrlISABus *isa = container_of(d, FDCtrlISABus, busdev.qdev);
714
    FDCtrl *s = &isa->state;
715

    
716
    fdctrl_reset(s, 0);
717
}
718

    
719
static void fdctrl_handle_tc(void *opaque, int irq, int level)
720
{
721
    //FDCtrl *s = opaque;
722

    
723
    if (level) {
724
        // XXX
725
        FLOPPY_DPRINTF("TC pulsed\n");
726
    }
727
}
728

    
729
/* XXX: may change if moved to bdrv */
730
int fdctrl_get_drive_type(FDCtrl *fdctrl, int drive_num)
731
{
732
    return fdctrl->drives[drive_num].drive;
733
}
734

    
735
/* Change IRQ state */
736
static void fdctrl_reset_irq(FDCtrl *fdctrl)
737
{
738
    if (!(fdctrl->sra & FD_SRA_INTPEND))
739
        return;
740
    FLOPPY_DPRINTF("Reset interrupt\n");
741
    qemu_set_irq(fdctrl->irq, 0);
742
    fdctrl->sra &= ~FD_SRA_INTPEND;
743
}
744

    
745
static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0)
746
{
747
    /* Sparc mutation */
748
    if (fdctrl->sun4m && (fdctrl->msr & FD_MSR_CMDBUSY)) {
749
        /* XXX: not sure */
750
        fdctrl->msr &= ~FD_MSR_CMDBUSY;
751
        fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
752
        fdctrl->status0 = status0;
753
        return;
754
    }
755
    if (!(fdctrl->sra & FD_SRA_INTPEND)) {
756
        qemu_set_irq(fdctrl->irq, 1);
757
        fdctrl->sra |= FD_SRA_INTPEND;
758
    }
759
    fdctrl->reset_sensei = 0;
760
    fdctrl->status0 = status0;
761
    FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
762
}
763

    
764
/* Reset controller */
765
static void fdctrl_reset(FDCtrl *fdctrl, int do_irq)
766
{
767
    int i;
768

    
769
    FLOPPY_DPRINTF("reset controller\n");
770
    fdctrl_reset_irq(fdctrl);
771
    /* Initialise controller */
772
    fdctrl->sra = 0;
773
    fdctrl->srb = 0xc0;
774
    if (!fdctrl->drives[1].bs)
775
        fdctrl->sra |= FD_SRA_nDRV2;
776
    fdctrl->cur_drv = 0;
777
    fdctrl->dor = FD_DOR_nRESET;
778
    fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
779
    fdctrl->msr = FD_MSR_RQM;
780
    /* FIFO state */
781
    fdctrl->data_pos = 0;
782
    fdctrl->data_len = 0;
783
    fdctrl->data_state = 0;
784
    fdctrl->data_dir = FD_DIR_WRITE;
785
    for (i = 0; i < MAX_FD; i++)
786
        fd_recalibrate(&fdctrl->drives[i]);
787
    fdctrl_reset_fifo(fdctrl);
788
    if (do_irq) {
789
        fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
790
        fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
791
    }
792
}
793

    
794
static inline FDrive *drv0(FDCtrl *fdctrl)
795
{
796
    return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
797
}
798

    
799
static inline FDrive *drv1(FDCtrl *fdctrl)
800
{
801
    if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
802
        return &fdctrl->drives[1];
803
    else
804
        return &fdctrl->drives[0];
805
}
806

    
807
#if MAX_FD == 4
808
static inline FDrive *drv2(FDCtrl *fdctrl)
809
{
810
    if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
811
        return &fdctrl->drives[2];
812
    else
813
        return &fdctrl->drives[1];
814
}
815

    
816
static inline FDrive *drv3(FDCtrl *fdctrl)
817
{
818
    if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
819
        return &fdctrl->drives[3];
820
    else
821
        return &fdctrl->drives[2];
822
}
823
#endif
824

    
825
static FDrive *get_cur_drv(FDCtrl *fdctrl)
826
{
827
    switch (fdctrl->cur_drv) {
828
        case 0: return drv0(fdctrl);
829
        case 1: return drv1(fdctrl);
830
#if MAX_FD == 4
831
        case 2: return drv2(fdctrl);
832
        case 3: return drv3(fdctrl);
833
#endif
834
        default: return NULL;
835
    }
836
}
837

    
838
/* Status A register : 0x00 (read-only) */
839
static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl)
840
{
841
    uint32_t retval = fdctrl->sra;
842

    
843
    FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
844

    
845
    return retval;
846
}
847

    
848
/* Status B register : 0x01 (read-only) */
849
static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl)
850
{
851
    uint32_t retval = fdctrl->srb;
852

    
853
    FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
854

    
855
    return retval;
856
}
857

    
858
/* Digital output register : 0x02 */
859
static uint32_t fdctrl_read_dor(FDCtrl *fdctrl)
860
{
861
    uint32_t retval = fdctrl->dor;
862

    
863
    /* Selected drive */
864
    retval |= fdctrl->cur_drv;
865
    FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
866

    
867
    return retval;
868
}
869

    
870
static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value)
871
{
872
    FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
873

    
874
    /* Motors */
875
    if (value & FD_DOR_MOTEN0)
876
        fdctrl->srb |= FD_SRB_MTR0;
877
    else
878
        fdctrl->srb &= ~FD_SRB_MTR0;
879
    if (value & FD_DOR_MOTEN1)
880
        fdctrl->srb |= FD_SRB_MTR1;
881
    else
882
        fdctrl->srb &= ~FD_SRB_MTR1;
883

    
884
    /* Drive */
885
    if (value & 1)
886
        fdctrl->srb |= FD_SRB_DR0;
887
    else
888
        fdctrl->srb &= ~FD_SRB_DR0;
889

    
890
    /* Reset */
891
    if (!(value & FD_DOR_nRESET)) {
892
        if (fdctrl->dor & FD_DOR_nRESET) {
893
            FLOPPY_DPRINTF("controller enter RESET state\n");
894
        }
895
    } else {
896
        if (!(fdctrl->dor & FD_DOR_nRESET)) {
897
            FLOPPY_DPRINTF("controller out of RESET state\n");
898
            fdctrl_reset(fdctrl, 1);
899
            fdctrl->dsr &= ~FD_DSR_PWRDOWN;
900
        }
901
    }
902
    /* Selected drive */
903
    fdctrl->cur_drv = value & FD_DOR_SELMASK;
904

    
905
    fdctrl->dor = value;
906
}
907

    
908
/* Tape drive register : 0x03 */
909
static uint32_t fdctrl_read_tape(FDCtrl *fdctrl)
910
{
911
    uint32_t retval = fdctrl->tdr;
912

    
913
    FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
914

    
915
    return retval;
916
}
917

    
918
static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value)
919
{
920
    /* Reset mode */
921
    if (!(fdctrl->dor & FD_DOR_nRESET)) {
922
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
923
        return;
924
    }
925
    FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
926
    /* Disk boot selection indicator */
927
    fdctrl->tdr = value & FD_TDR_BOOTSEL;
928
    /* Tape indicators: never allow */
929
}
930

    
931
/* Main status register : 0x04 (read) */
932
static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl)
933
{
934
    uint32_t retval = fdctrl->msr;
935

    
936
    fdctrl->dsr &= ~FD_DSR_PWRDOWN;
937
    fdctrl->dor |= FD_DOR_nRESET;
938

    
939
    /* Sparc mutation */
940
    if (fdctrl->sun4m) {
941
        retval |= FD_MSR_DIO;
942
        fdctrl_reset_irq(fdctrl);
943
    };
944

    
945
    FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
946

    
947
    return retval;
948
}
949

    
950
/* Data select rate register : 0x04 (write) */
951
static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value)
952
{
953
    /* Reset mode */
954
    if (!(fdctrl->dor & FD_DOR_nRESET)) {
955
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
956
        return;
957
    }
958
    FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
959
    /* Reset: autoclear */
960
    if (value & FD_DSR_SWRESET) {
961
        fdctrl->dor &= ~FD_DOR_nRESET;
962
        fdctrl_reset(fdctrl, 1);
963
        fdctrl->dor |= FD_DOR_nRESET;
964
    }
965
    if (value & FD_DSR_PWRDOWN) {
966
        fdctrl_reset(fdctrl, 1);
967
    }
968
    fdctrl->dsr = value;
969
}
970

    
971
static int fdctrl_media_changed(FDrive *drv)
972
{
973
    int ret;
974

    
975
    if (!drv->bs)
976
        return 0;
977
    ret = bdrv_media_changed(drv->bs);
978
    if (ret) {
979
        fd_revalidate(drv);
980
    }
981
    return ret;
982
}
983

    
984
/* Digital input register : 0x07 (read-only) */
985
static uint32_t fdctrl_read_dir(FDCtrl *fdctrl)
986
{
987
    uint32_t retval = 0;
988

    
989
    if (fdctrl_media_changed(drv0(fdctrl))
990
     || fdctrl_media_changed(drv1(fdctrl))
991
#if MAX_FD == 4
992
     || fdctrl_media_changed(drv2(fdctrl))
993
     || fdctrl_media_changed(drv3(fdctrl))
994
#endif
995
        )
996
        retval |= FD_DIR_DSKCHG;
997
    if (retval != 0)
998
        FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
999

    
1000
    return retval;
1001
}
1002

    
1003
/* FIFO state control */
1004
static void fdctrl_reset_fifo(FDCtrl *fdctrl)
1005
{
1006
    fdctrl->data_dir = FD_DIR_WRITE;
1007
    fdctrl->data_pos = 0;
1008
    fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1009
}
1010

    
1011
/* Set FIFO status for the host to read */
1012
static void fdctrl_set_fifo(FDCtrl *fdctrl, int fifo_len, int do_irq)
1013
{
1014
    fdctrl->data_dir = FD_DIR_READ;
1015
    fdctrl->data_len = fifo_len;
1016
    fdctrl->data_pos = 0;
1017
    fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1018
    if (do_irq)
1019
        fdctrl_raise_irq(fdctrl, 0x00);
1020
}
1021

    
1022
/* Set an error: unimplemented/unknown command */
1023
static void fdctrl_unimplemented(FDCtrl *fdctrl, int direction)
1024
{
1025
    FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1026
    fdctrl->fifo[0] = FD_SR0_INVCMD;
1027
    fdctrl_set_fifo(fdctrl, 1, 0);
1028
}
1029

    
1030
/* Seek to next sector */
1031
static int fdctrl_seek_to_next_sect(FDCtrl *fdctrl, FDrive *cur_drv)
1032
{
1033
    FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1034
                   cur_drv->head, cur_drv->track, cur_drv->sect,
1035
                   fd_sector(cur_drv));
1036
    /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1037
       error in fact */
1038
    if (cur_drv->sect >= cur_drv->last_sect ||
1039
        cur_drv->sect == fdctrl->eot) {
1040
        cur_drv->sect = 1;
1041
        if (FD_MULTI_TRACK(fdctrl->data_state)) {
1042
            if (cur_drv->head == 0 &&
1043
                (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1044
                cur_drv->head = 1;
1045
            } else {
1046
                cur_drv->head = 0;
1047
                cur_drv->track++;
1048
                if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1049
                    return 0;
1050
            }
1051
        } else {
1052
            cur_drv->track++;
1053
            return 0;
1054
        }
1055
        FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1056
                       cur_drv->head, cur_drv->track,
1057
                       cur_drv->sect, fd_sector(cur_drv));
1058
    } else {
1059
        cur_drv->sect++;
1060
    }
1061
    return 1;
1062
}
1063

    
1064
/* Callback for transfer end (stop or abort) */
1065
static void fdctrl_stop_transfer(FDCtrl *fdctrl, uint8_t status0,
1066
                                 uint8_t status1, uint8_t status2)
1067
{
1068
    FDrive *cur_drv;
1069

    
1070
    cur_drv = get_cur_drv(fdctrl);
1071
    FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1072
                   status0, status1, status2,
1073
                   status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1074
    fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1075
    fdctrl->fifo[1] = status1;
1076
    fdctrl->fifo[2] = status2;
1077
    fdctrl->fifo[3] = cur_drv->track;
1078
    fdctrl->fifo[4] = cur_drv->head;
1079
    fdctrl->fifo[5] = cur_drv->sect;
1080
    fdctrl->fifo[6] = FD_SECTOR_SC;
1081
    fdctrl->data_dir = FD_DIR_READ;
1082
    if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1083
        DMA_release_DREQ(fdctrl->dma_chann);
1084
    }
1085
    fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1086
    fdctrl->msr &= ~FD_MSR_NONDMA;
1087
    fdctrl_set_fifo(fdctrl, 7, 1);
1088
}
1089

    
1090
/* Prepare a data transfer (either DMA or FIFO) */
1091
static void fdctrl_start_transfer(FDCtrl *fdctrl, int direction)
1092
{
1093
    FDrive *cur_drv;
1094
    uint8_t kh, kt, ks;
1095
    int did_seek = 0;
1096

    
1097
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1098
    cur_drv = get_cur_drv(fdctrl);
1099
    kt = fdctrl->fifo[2];
1100
    kh = fdctrl->fifo[3];
1101
    ks = fdctrl->fifo[4];
1102
    FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1103
                   GET_CUR_DRV(fdctrl), kh, kt, ks,
1104
                   fd_sector_calc(kh, kt, ks, cur_drv->last_sect));
1105
    switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1106
    case 2:
1107
        /* sect too big */
1108
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1109
        fdctrl->fifo[3] = kt;
1110
        fdctrl->fifo[4] = kh;
1111
        fdctrl->fifo[5] = ks;
1112
        return;
1113
    case 3:
1114
        /* track too big */
1115
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1116
        fdctrl->fifo[3] = kt;
1117
        fdctrl->fifo[4] = kh;
1118
        fdctrl->fifo[5] = ks;
1119
        return;
1120
    case 4:
1121
        /* No seek enabled */
1122
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1123
        fdctrl->fifo[3] = kt;
1124
        fdctrl->fifo[4] = kh;
1125
        fdctrl->fifo[5] = ks;
1126
        return;
1127
    case 1:
1128
        did_seek = 1;
1129
        break;
1130
    default:
1131
        break;
1132
    }
1133

    
1134
    /* Set the FIFO state */
1135
    fdctrl->data_dir = direction;
1136
    fdctrl->data_pos = 0;
1137
    fdctrl->msr |= FD_MSR_CMDBUSY;
1138
    if (fdctrl->fifo[0] & 0x80)
1139
        fdctrl->data_state |= FD_STATE_MULTI;
1140
    else
1141
        fdctrl->data_state &= ~FD_STATE_MULTI;
1142
    if (did_seek)
1143
        fdctrl->data_state |= FD_STATE_SEEK;
1144
    else
1145
        fdctrl->data_state &= ~FD_STATE_SEEK;
1146
    if (fdctrl->fifo[5] == 00) {
1147
        fdctrl->data_len = fdctrl->fifo[8];
1148
    } else {
1149
        int tmp;
1150
        fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1151
        tmp = (fdctrl->fifo[6] - ks + 1);
1152
        if (fdctrl->fifo[0] & 0x80)
1153
            tmp += fdctrl->fifo[6];
1154
        fdctrl->data_len *= tmp;
1155
    }
1156
    fdctrl->eot = fdctrl->fifo[6];
1157
    if (fdctrl->dor & FD_DOR_DMAEN) {
1158
        int dma_mode;
1159
        /* DMA transfer are enabled. Check if DMA channel is well programmed */
1160
        dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
1161
        dma_mode = (dma_mode >> 2) & 3;
1162
        FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1163
                       dma_mode, direction,
1164
                       (128 << fdctrl->fifo[5]) *
1165
                       (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1166
        if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1167
              direction == FD_DIR_SCANH) && dma_mode == 0) ||
1168
            (direction == FD_DIR_WRITE && dma_mode == 2) ||
1169
            (direction == FD_DIR_READ && dma_mode == 1)) {
1170
            /* No access is allowed until DMA transfer has completed */
1171
            fdctrl->msr &= ~FD_MSR_RQM;
1172
            /* Now, we just have to wait for the DMA controller to
1173
             * recall us...
1174
             */
1175
            DMA_hold_DREQ(fdctrl->dma_chann);
1176
            DMA_schedule(fdctrl->dma_chann);
1177
            return;
1178
        } else {
1179
            FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1180
        }
1181
    }
1182
    FLOPPY_DPRINTF("start non-DMA transfer\n");
1183
    fdctrl->msr |= FD_MSR_NONDMA;
1184
    if (direction != FD_DIR_WRITE)
1185
        fdctrl->msr |= FD_MSR_DIO;
1186
    /* IO based transfer: calculate len */
1187
    fdctrl_raise_irq(fdctrl, 0x00);
1188

    
1189
    return;
1190
}
1191

    
1192
/* Prepare a transfer of deleted data */
1193
static void fdctrl_start_transfer_del(FDCtrl *fdctrl, int direction)
1194
{
1195
    FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1196

    
1197
    /* We don't handle deleted data,
1198
     * so we don't return *ANYTHING*
1199
     */
1200
    fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1201
}
1202

    
1203
/* handlers for DMA transfers */
1204
static int fdctrl_transfer_handler (void *opaque, int nchan,
1205
                                    int dma_pos, int dma_len)
1206
{
1207
    FDCtrl *fdctrl;
1208
    FDrive *cur_drv;
1209
    int len, start_pos, rel_pos;
1210
    uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1211

    
1212
    fdctrl = opaque;
1213
    if (fdctrl->msr & FD_MSR_RQM) {
1214
        FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1215
        return 0;
1216
    }
1217
    cur_drv = get_cur_drv(fdctrl);
1218
    if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1219
        fdctrl->data_dir == FD_DIR_SCANH)
1220
        status2 = FD_SR2_SNS;
1221
    if (dma_len > fdctrl->data_len)
1222
        dma_len = fdctrl->data_len;
1223
    if (cur_drv->bs == NULL) {
1224
        if (fdctrl->data_dir == FD_DIR_WRITE)
1225
            fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1226
        else
1227
            fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1228
        len = 0;
1229
        goto transfer_error;
1230
    }
1231
    rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1232
    for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1233
        len = dma_len - fdctrl->data_pos;
1234
        if (len + rel_pos > FD_SECTOR_LEN)
1235
            len = FD_SECTOR_LEN - rel_pos;
1236
        FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1237
                       "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1238
                       fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1239
                       cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1240
                       fd_sector(cur_drv) * FD_SECTOR_LEN);
1241
        if (fdctrl->data_dir != FD_DIR_WRITE ||
1242
            len < FD_SECTOR_LEN || rel_pos != 0) {
1243
            /* READ & SCAN commands and realign to a sector for WRITE */
1244
            if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1245
                          fdctrl->fifo, 1) < 0) {
1246
                FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1247
                               fd_sector(cur_drv));
1248
                /* Sure, image size is too small... */
1249
                memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1250
            }
1251
        }
1252
        switch (fdctrl->data_dir) {
1253
        case FD_DIR_READ:
1254
            /* READ commands */
1255
            DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
1256
                              fdctrl->data_pos, len);
1257
            break;
1258
        case FD_DIR_WRITE:
1259
            /* WRITE commands */
1260
            DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
1261
                             fdctrl->data_pos, len);
1262
            if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1263
                           fdctrl->fifo, 1) < 0) {
1264
                FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1265
                fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1266
                goto transfer_error;
1267
            }
1268
            break;
1269
        default:
1270
            /* SCAN commands */
1271
            {
1272
                uint8_t tmpbuf[FD_SECTOR_LEN];
1273
                int ret;
1274
                DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1275
                ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1276
                if (ret == 0) {
1277
                    status2 = FD_SR2_SEH;
1278
                    goto end_transfer;
1279
                }
1280
                if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1281
                    (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1282
                    status2 = 0x00;
1283
                    goto end_transfer;
1284
                }
1285
            }
1286
            break;
1287
        }
1288
        fdctrl->data_pos += len;
1289
        rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1290
        if (rel_pos == 0) {
1291
            /* Seek to next sector */
1292
            if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1293
                break;
1294
        }
1295
    }
1296
 end_transfer:
1297
    len = fdctrl->data_pos - start_pos;
1298
    FLOPPY_DPRINTF("end transfer %d %d %d\n",
1299
                   fdctrl->data_pos, len, fdctrl->data_len);
1300
    if (fdctrl->data_dir == FD_DIR_SCANE ||
1301
        fdctrl->data_dir == FD_DIR_SCANL ||
1302
        fdctrl->data_dir == FD_DIR_SCANH)
1303
        status2 = FD_SR2_SEH;
1304
    if (FD_DID_SEEK(fdctrl->data_state))
1305
        status0 |= FD_SR0_SEEK;
1306
    fdctrl->data_len -= len;
1307
    fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1308
 transfer_error:
1309

    
1310
    return len;
1311
}
1312

    
1313
/* Data register : 0x05 */
1314
static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
1315
{
1316
    FDrive *cur_drv;
1317
    uint32_t retval = 0;
1318
    int pos;
1319

    
1320
    cur_drv = get_cur_drv(fdctrl);
1321
    fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1322
    if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1323
        FLOPPY_ERROR("controller not ready for reading\n");
1324
        return 0;
1325
    }
1326
    pos = fdctrl->data_pos;
1327
    if (fdctrl->msr & FD_MSR_NONDMA) {
1328
        pos %= FD_SECTOR_LEN;
1329
        if (pos == 0) {
1330
            if (fdctrl->data_pos != 0)
1331
                if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1332
                    FLOPPY_DPRINTF("error seeking to next sector %d\n",
1333
                                   fd_sector(cur_drv));
1334
                    return 0;
1335
                }
1336
            if (bdrv_read(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1337
                FLOPPY_DPRINTF("error getting sector %d\n",
1338
                               fd_sector(cur_drv));
1339
                /* Sure, image size is too small... */
1340
                memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1341
            }
1342
        }
1343
    }
1344
    retval = fdctrl->fifo[pos];
1345
    if (++fdctrl->data_pos == fdctrl->data_len) {
1346
        fdctrl->data_pos = 0;
1347
        /* Switch from transfer mode to status mode
1348
         * then from status mode to command mode
1349
         */
1350
        if (fdctrl->msr & FD_MSR_NONDMA) {
1351
            fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1352
        } else {
1353
            fdctrl_reset_fifo(fdctrl);
1354
            fdctrl_reset_irq(fdctrl);
1355
        }
1356
    }
1357
    FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1358

    
1359
    return retval;
1360
}
1361

    
1362
static void fdctrl_format_sector(FDCtrl *fdctrl)
1363
{
1364
    FDrive *cur_drv;
1365
    uint8_t kh, kt, ks;
1366

    
1367
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1368
    cur_drv = get_cur_drv(fdctrl);
1369
    kt = fdctrl->fifo[6];
1370
    kh = fdctrl->fifo[7];
1371
    ks = fdctrl->fifo[8];
1372
    FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1373
                   GET_CUR_DRV(fdctrl), kh, kt, ks,
1374
                   fd_sector_calc(kh, kt, ks, cur_drv->last_sect));
1375
    switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1376
    case 2:
1377
        /* sect too big */
1378
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1379
        fdctrl->fifo[3] = kt;
1380
        fdctrl->fifo[4] = kh;
1381
        fdctrl->fifo[5] = ks;
1382
        return;
1383
    case 3:
1384
        /* track too big */
1385
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1386
        fdctrl->fifo[3] = kt;
1387
        fdctrl->fifo[4] = kh;
1388
        fdctrl->fifo[5] = ks;
1389
        return;
1390
    case 4:
1391
        /* No seek enabled */
1392
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1393
        fdctrl->fifo[3] = kt;
1394
        fdctrl->fifo[4] = kh;
1395
        fdctrl->fifo[5] = ks;
1396
        return;
1397
    case 1:
1398
        fdctrl->data_state |= FD_STATE_SEEK;
1399
        break;
1400
    default:
1401
        break;
1402
    }
1403
    memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1404
    if (cur_drv->bs == NULL ||
1405
        bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1406
        FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1407
        fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1408
    } else {
1409
        if (cur_drv->sect == cur_drv->last_sect) {
1410
            fdctrl->data_state &= ~FD_STATE_FORMAT;
1411
            /* Last sector done */
1412
            if (FD_DID_SEEK(fdctrl->data_state))
1413
                fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1414
            else
1415
                fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1416
        } else {
1417
            /* More to do */
1418
            fdctrl->data_pos = 0;
1419
            fdctrl->data_len = 4;
1420
        }
1421
    }
1422
}
1423

    
1424
static void fdctrl_handle_lock(FDCtrl *fdctrl, int direction)
1425
{
1426
    fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1427
    fdctrl->fifo[0] = fdctrl->lock << 4;
1428
    fdctrl_set_fifo(fdctrl, 1, fdctrl->lock);
1429
}
1430

    
1431
static void fdctrl_handle_dumpreg(FDCtrl *fdctrl, int direction)
1432
{
1433
    FDrive *cur_drv = get_cur_drv(fdctrl);
1434

    
1435
    /* Drives position */
1436
    fdctrl->fifo[0] = drv0(fdctrl)->track;
1437
    fdctrl->fifo[1] = drv1(fdctrl)->track;
1438
#if MAX_FD == 4
1439
    fdctrl->fifo[2] = drv2(fdctrl)->track;
1440
    fdctrl->fifo[3] = drv3(fdctrl)->track;
1441
#else
1442
    fdctrl->fifo[2] = 0;
1443
    fdctrl->fifo[3] = 0;
1444
#endif
1445
    /* timers */
1446
    fdctrl->fifo[4] = fdctrl->timer0;
1447
    fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1448
    fdctrl->fifo[6] = cur_drv->last_sect;
1449
    fdctrl->fifo[7] = (fdctrl->lock << 7) |
1450
        (cur_drv->perpendicular << 2);
1451
    fdctrl->fifo[8] = fdctrl->config;
1452
    fdctrl->fifo[9] = fdctrl->precomp_trk;
1453
    fdctrl_set_fifo(fdctrl, 10, 0);
1454
}
1455

    
1456
static void fdctrl_handle_version(FDCtrl *fdctrl, int direction)
1457
{
1458
    /* Controller's version */
1459
    fdctrl->fifo[0] = fdctrl->version;
1460
    fdctrl_set_fifo(fdctrl, 1, 1);
1461
}
1462

    
1463
static void fdctrl_handle_partid(FDCtrl *fdctrl, int direction)
1464
{
1465
    fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1466
    fdctrl_set_fifo(fdctrl, 1, 0);
1467
}
1468

    
1469
static void fdctrl_handle_restore(FDCtrl *fdctrl, int direction)
1470
{
1471
    FDrive *cur_drv = get_cur_drv(fdctrl);
1472

    
1473
    /* Drives position */
1474
    drv0(fdctrl)->track = fdctrl->fifo[3];
1475
    drv1(fdctrl)->track = fdctrl->fifo[4];
1476
#if MAX_FD == 4
1477
    drv2(fdctrl)->track = fdctrl->fifo[5];
1478
    drv3(fdctrl)->track = fdctrl->fifo[6];
1479
#endif
1480
    /* timers */
1481
    fdctrl->timer0 = fdctrl->fifo[7];
1482
    fdctrl->timer1 = fdctrl->fifo[8];
1483
    cur_drv->last_sect = fdctrl->fifo[9];
1484
    fdctrl->lock = fdctrl->fifo[10] >> 7;
1485
    cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1486
    fdctrl->config = fdctrl->fifo[11];
1487
    fdctrl->precomp_trk = fdctrl->fifo[12];
1488
    fdctrl->pwrd = fdctrl->fifo[13];
1489
    fdctrl_reset_fifo(fdctrl);
1490
}
1491

    
1492
static void fdctrl_handle_save(FDCtrl *fdctrl, int direction)
1493
{
1494
    FDrive *cur_drv = get_cur_drv(fdctrl);
1495

    
1496
    fdctrl->fifo[0] = 0;
1497
    fdctrl->fifo[1] = 0;
1498
    /* Drives position */
1499
    fdctrl->fifo[2] = drv0(fdctrl)->track;
1500
    fdctrl->fifo[3] = drv1(fdctrl)->track;
1501
#if MAX_FD == 4
1502
    fdctrl->fifo[4] = drv2(fdctrl)->track;
1503
    fdctrl->fifo[5] = drv3(fdctrl)->track;
1504
#else
1505
    fdctrl->fifo[4] = 0;
1506
    fdctrl->fifo[5] = 0;
1507
#endif
1508
    /* timers */
1509
    fdctrl->fifo[6] = fdctrl->timer0;
1510
    fdctrl->fifo[7] = fdctrl->timer1;
1511
    fdctrl->fifo[8] = cur_drv->last_sect;
1512
    fdctrl->fifo[9] = (fdctrl->lock << 7) |
1513
        (cur_drv->perpendicular << 2);
1514
    fdctrl->fifo[10] = fdctrl->config;
1515
    fdctrl->fifo[11] = fdctrl->precomp_trk;
1516
    fdctrl->fifo[12] = fdctrl->pwrd;
1517
    fdctrl->fifo[13] = 0;
1518
    fdctrl->fifo[14] = 0;
1519
    fdctrl_set_fifo(fdctrl, 15, 1);
1520
}
1521

    
1522
static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction)
1523
{
1524
    FDrive *cur_drv = get_cur_drv(fdctrl);
1525

    
1526
    /* XXX: should set main status register to busy */
1527
    cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1528
    qemu_mod_timer(fdctrl->result_timer,
1529
                   qemu_get_clock(vm_clock) + (get_ticks_per_sec() / 50));
1530
}
1531

    
1532
static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
1533
{
1534
    FDrive *cur_drv;
1535

    
1536
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1537
    cur_drv = get_cur_drv(fdctrl);
1538
    fdctrl->data_state |= FD_STATE_FORMAT;
1539
    if (fdctrl->fifo[0] & 0x80)
1540
        fdctrl->data_state |= FD_STATE_MULTI;
1541
    else
1542
        fdctrl->data_state &= ~FD_STATE_MULTI;
1543
    fdctrl->data_state &= ~FD_STATE_SEEK;
1544
    cur_drv->bps =
1545
        fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1546
#if 0
1547
    cur_drv->last_sect =
1548
        cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1549
        fdctrl->fifo[3] / 2;
1550
#else
1551
    cur_drv->last_sect = fdctrl->fifo[3];
1552
#endif
1553
    /* TODO: implement format using DMA expected by the Bochs BIOS
1554
     * and Linux fdformat (read 3 bytes per sector via DMA and fill
1555
     * the sector with the specified fill byte
1556
     */
1557
    fdctrl->data_state &= ~FD_STATE_FORMAT;
1558
    fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1559
}
1560

    
1561
static void fdctrl_handle_specify(FDCtrl *fdctrl, int direction)
1562
{
1563
    fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1564
    fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1565
    if (fdctrl->fifo[2] & 1)
1566
        fdctrl->dor &= ~FD_DOR_DMAEN;
1567
    else
1568
        fdctrl->dor |= FD_DOR_DMAEN;
1569
    /* No result back */
1570
    fdctrl_reset_fifo(fdctrl);
1571
}
1572

    
1573
static void fdctrl_handle_sense_drive_status(FDCtrl *fdctrl, int direction)
1574
{
1575
    FDrive *cur_drv;
1576

    
1577
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1578
    cur_drv = get_cur_drv(fdctrl);
1579
    cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1580
    /* 1 Byte status back */
1581
    fdctrl->fifo[0] = (cur_drv->ro << 6) |
1582
        (cur_drv->track == 0 ? 0x10 : 0x00) |
1583
        (cur_drv->head << 2) |
1584
        GET_CUR_DRV(fdctrl) |
1585
        0x28;
1586
    fdctrl_set_fifo(fdctrl, 1, 0);
1587
}
1588

    
1589
static void fdctrl_handle_recalibrate(FDCtrl *fdctrl, int direction)
1590
{
1591
    FDrive *cur_drv;
1592

    
1593
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1594
    cur_drv = get_cur_drv(fdctrl);
1595
    fd_recalibrate(cur_drv);
1596
    fdctrl_reset_fifo(fdctrl);
1597
    /* Raise Interrupt */
1598
    fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1599
}
1600

    
1601
static void fdctrl_handle_sense_interrupt_status(FDCtrl *fdctrl, int direction)
1602
{
1603
    FDrive *cur_drv = get_cur_drv(fdctrl);
1604

    
1605
    if(fdctrl->reset_sensei > 0) {
1606
        fdctrl->fifo[0] =
1607
            FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1608
        fdctrl->reset_sensei--;
1609
    } else {
1610
        /* XXX: status0 handling is broken for read/write
1611
           commands, so we do this hack. It should be suppressed
1612
           ASAP */
1613
        fdctrl->fifo[0] =
1614
            FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1615
    }
1616

    
1617
    fdctrl->fifo[1] = cur_drv->track;
1618
    fdctrl_set_fifo(fdctrl, 2, 0);
1619
    fdctrl_reset_irq(fdctrl);
1620
    fdctrl->status0 = FD_SR0_RDYCHG;
1621
}
1622

    
1623
static void fdctrl_handle_seek(FDCtrl *fdctrl, int direction)
1624
{
1625
    FDrive *cur_drv;
1626

    
1627
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1628
    cur_drv = get_cur_drv(fdctrl);
1629
    fdctrl_reset_fifo(fdctrl);
1630
    if (fdctrl->fifo[2] > cur_drv->max_track) {
1631
        fdctrl_raise_irq(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK);
1632
    } else {
1633
        cur_drv->track = fdctrl->fifo[2];
1634
        /* Raise Interrupt */
1635
        fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1636
    }
1637
}
1638

    
1639
static void fdctrl_handle_perpendicular_mode(FDCtrl *fdctrl, int direction)
1640
{
1641
    FDrive *cur_drv = get_cur_drv(fdctrl);
1642

    
1643
    if (fdctrl->fifo[1] & 0x80)
1644
        cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
1645
    /* No result back */
1646
    fdctrl_reset_fifo(fdctrl);
1647
}
1648

    
1649
static void fdctrl_handle_configure(FDCtrl *fdctrl, int direction)
1650
{
1651
    fdctrl->config = fdctrl->fifo[2];
1652
    fdctrl->precomp_trk =  fdctrl->fifo[3];
1653
    /* No result back */
1654
    fdctrl_reset_fifo(fdctrl);
1655
}
1656

    
1657
static void fdctrl_handle_powerdown_mode(FDCtrl *fdctrl, int direction)
1658
{
1659
    fdctrl->pwrd = fdctrl->fifo[1];
1660
    fdctrl->fifo[0] = fdctrl->fifo[1];
1661
    fdctrl_set_fifo(fdctrl, 1, 1);
1662
}
1663

    
1664
static void fdctrl_handle_option(FDCtrl *fdctrl, int direction)
1665
{
1666
    /* No result back */
1667
    fdctrl_reset_fifo(fdctrl);
1668
}
1669

    
1670
static void fdctrl_handle_drive_specification_command(FDCtrl *fdctrl, int direction)
1671
{
1672
    FDrive *cur_drv = get_cur_drv(fdctrl);
1673

    
1674
    if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
1675
        /* Command parameters done */
1676
        if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1677
            fdctrl->fifo[0] = fdctrl->fifo[1];
1678
            fdctrl->fifo[2] = 0;
1679
            fdctrl->fifo[3] = 0;
1680
            fdctrl_set_fifo(fdctrl, 4, 1);
1681
        } else {
1682
            fdctrl_reset_fifo(fdctrl);
1683
        }
1684
    } else if (fdctrl->data_len > 7) {
1685
        /* ERROR */
1686
        fdctrl->fifo[0] = 0x80 |
1687
            (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1688
        fdctrl_set_fifo(fdctrl, 1, 1);
1689
    }
1690
}
1691

    
1692
static void fdctrl_handle_relative_seek_out(FDCtrl *fdctrl, int direction)
1693
{
1694
    FDrive *cur_drv;
1695

    
1696
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1697
    cur_drv = get_cur_drv(fdctrl);
1698
    if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1699
        cur_drv->track = cur_drv->max_track - 1;
1700
    } else {
1701
        cur_drv->track += fdctrl->fifo[2];
1702
    }
1703
    fdctrl_reset_fifo(fdctrl);
1704
    /* Raise Interrupt */
1705
    fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1706
}
1707

    
1708
static void fdctrl_handle_relative_seek_in(FDCtrl *fdctrl, int direction)
1709
{
1710
    FDrive *cur_drv;
1711

    
1712
    SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1713
    cur_drv = get_cur_drv(fdctrl);
1714
    if (fdctrl->fifo[2] > cur_drv->track) {
1715
        cur_drv->track = 0;
1716
    } else {
1717
        cur_drv->track -= fdctrl->fifo[2];
1718
    }
1719
    fdctrl_reset_fifo(fdctrl);
1720
    /* Raise Interrupt */
1721
    fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1722
}
1723

    
1724
static const struct {
1725
    uint8_t value;
1726
    uint8_t mask;
1727
    const char* name;
1728
    int parameters;
1729
    void (*handler)(FDCtrl *fdctrl, int direction);
1730
    int direction;
1731
} handlers[] = {
1732
    { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
1733
    { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
1734
    { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
1735
    { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
1736
    { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
1737
    { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
1738
    { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
1739
    { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
1740
    { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
1741
    { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
1742
    { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
1743
    { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
1744
    { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
1745
    { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
1746
    { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
1747
    { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
1748
    { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
1749
    { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
1750
    { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
1751
    { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
1752
    { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
1753
    { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
1754
    { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
1755
    { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
1756
    { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
1757
    { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
1758
    { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
1759
    { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
1760
    { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
1761
    { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
1762
    { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
1763
    { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
1764
};
1765
/* Associate command to an index in the 'handlers' array */
1766
static uint8_t command_to_handler[256];
1767

    
1768
static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value)
1769
{
1770
    FDrive *cur_drv;
1771
    int pos;
1772

    
1773
    /* Reset mode */
1774
    if (!(fdctrl->dor & FD_DOR_nRESET)) {
1775
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1776
        return;
1777
    }
1778
    if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
1779
        FLOPPY_ERROR("controller not ready for writing\n");
1780
        return;
1781
    }
1782
    fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1783
    /* Is it write command time ? */
1784
    if (fdctrl->msr & FD_MSR_NONDMA) {
1785
        /* FIFO data write */
1786
        pos = fdctrl->data_pos++;
1787
        pos %= FD_SECTOR_LEN;
1788
        fdctrl->fifo[pos] = value;
1789
        if (pos == FD_SECTOR_LEN - 1 ||
1790
            fdctrl->data_pos == fdctrl->data_len) {
1791
            cur_drv = get_cur_drv(fdctrl);
1792
            if (bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1793
                FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1794
                return;
1795
            }
1796
            if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1797
                FLOPPY_DPRINTF("error seeking to next sector %d\n",
1798
                               fd_sector(cur_drv));
1799
                return;
1800
            }
1801
        }
1802
        /* Switch from transfer mode to status mode
1803
         * then from status mode to command mode
1804
         */
1805
        if (fdctrl->data_pos == fdctrl->data_len)
1806
            fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1807
        return;
1808
    }
1809
    if (fdctrl->data_pos == 0) {
1810
        /* Command */
1811
        pos = command_to_handler[value & 0xff];
1812
        FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
1813
        fdctrl->data_len = handlers[pos].parameters + 1;
1814
    }
1815

    
1816
    FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1817
    fdctrl->fifo[fdctrl->data_pos++] = value;
1818
    if (fdctrl->data_pos == fdctrl->data_len) {
1819
        /* We now have all parameters
1820
         * and will be able to treat the command
1821
         */
1822
        if (fdctrl->data_state & FD_STATE_FORMAT) {
1823
            fdctrl_format_sector(fdctrl);
1824
            return;
1825
        }
1826

    
1827
        pos = command_to_handler[fdctrl->fifo[0] & 0xff];
1828
        FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
1829
        (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
1830
    }
1831
}
1832

    
1833
static void fdctrl_result_timer(void *opaque)
1834
{
1835
    FDCtrl *fdctrl = opaque;
1836
    FDrive *cur_drv = get_cur_drv(fdctrl);
1837

    
1838
    /* Pretend we are spinning.
1839
     * This is needed for Coherent, which uses READ ID to check for
1840
     * sector interleaving.
1841
     */
1842
    if (cur_drv->last_sect != 0) {
1843
        cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
1844
    }
1845
    fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1846
}
1847

    
1848
/* Init functions */
1849
static void fdctrl_connect_drives(FDCtrl *fdctrl)
1850
{
1851
    unsigned int i;
1852

    
1853
    for (i = 0; i < MAX_FD; i++) {
1854
        fd_init(&fdctrl->drives[i]);
1855
        fd_revalidate(&fdctrl->drives[i]);
1856
    }
1857
}
1858

    
1859
FDCtrl *fdctrl_init_isa(DriveInfo **fds)
1860
{
1861
    ISADevice *dev;
1862

    
1863
    dev = isa_create("isa-fdc");
1864
    if (fds[0]) {
1865
        qdev_prop_set_drive(&dev->qdev, "driveA", fds[0]);
1866
    }
1867
    if (fds[1]) {
1868
        qdev_prop_set_drive(&dev->qdev, "driveB", fds[1]);
1869
    }
1870
    if (qdev_init(&dev->qdev) < 0)
1871
        return NULL;
1872
    return &(DO_UPCAST(FDCtrlISABus, busdev, dev)->state);
1873
}
1874

    
1875
FDCtrl *fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
1876
                           target_phys_addr_t mmio_base, DriveInfo **fds)
1877
{
1878
    FDCtrl *fdctrl;
1879
    DeviceState *dev;
1880
    FDCtrlSysBus *sys;
1881

    
1882
    dev = qdev_create(NULL, "sysbus-fdc");
1883
    sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);
1884
    fdctrl = &sys->state;
1885
    fdctrl->dma_chann = dma_chann; /* FIXME */
1886
    if (fds[0]) {
1887
        qdev_prop_set_drive(dev, "driveA", fds[0]);
1888
    }
1889
    if (fds[1]) {
1890
        qdev_prop_set_drive(dev, "driveB", fds[1]);
1891
    }
1892
    qdev_init_nofail(dev);
1893
    sysbus_connect_irq(&sys->busdev, 0, irq);
1894
    sysbus_mmio_map(&sys->busdev, 0, mmio_base);
1895

    
1896
    return fdctrl;
1897
}
1898

    
1899
FDCtrl *sun4m_fdctrl_init(qemu_irq irq, target_phys_addr_t io_base,
1900
                          DriveInfo **fds, qemu_irq *fdc_tc)
1901
{
1902
    DeviceState *dev;
1903
    FDCtrlSysBus *sys;
1904
    FDCtrl *fdctrl;
1905

    
1906
    dev = qdev_create(NULL, "SUNW,fdtwo");
1907
    if (fds[0]) {
1908
        qdev_prop_set_drive(dev, "drive", fds[0]);
1909
    }
1910
    qdev_init_nofail(dev);
1911
    sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);
1912
    fdctrl = &sys->state;
1913
    sysbus_connect_irq(&sys->busdev, 0, irq);
1914
    sysbus_mmio_map(&sys->busdev, 0, io_base);
1915
    *fdc_tc = qdev_get_gpio_in(dev, 0);
1916

    
1917
    return fdctrl;
1918
}
1919

    
1920
static int fdctrl_init_common(FDCtrl *fdctrl, target_phys_addr_t io_base)
1921
{
1922
    int i, j;
1923
    static int command_tables_inited = 0;
1924

    
1925
    /* Fill 'command_to_handler' lookup table */
1926
    if (!command_tables_inited) {
1927
        command_tables_inited = 1;
1928
        for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) {
1929
            for (j = 0; j < sizeof(command_to_handler); j++) {
1930
                if ((j & handlers[i].mask) == handlers[i].value) {
1931
                    command_to_handler[j] = i;
1932
                }
1933
            }
1934
        }
1935
    }
1936

    
1937
    FLOPPY_DPRINTF("init controller\n");
1938
    fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
1939
    fdctrl->fifo_size = 512;
1940
    fdctrl->result_timer = qemu_new_timer(vm_clock,
1941
                                          fdctrl_result_timer, fdctrl);
1942

    
1943
    fdctrl->version = 0x90; /* Intel 82078 controller */
1944
    fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
1945
    fdctrl->num_floppies = MAX_FD;
1946

    
1947
    if (fdctrl->dma_chann != -1)
1948
        DMA_register_channel(fdctrl->dma_chann, &fdctrl_transfer_handler, fdctrl);
1949
    fdctrl_connect_drives(fdctrl);
1950

    
1951
    vmstate_register(io_base, &vmstate_fdc, fdctrl);
1952
    return 0;
1953
}
1954

    
1955
static int isabus_fdc_init1(ISADevice *dev)
1956
{
1957
    FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
1958
    FDCtrl *fdctrl = &isa->state;
1959
    int iobase = 0x3f0;
1960
    int isairq = 6;
1961
    int dma_chann = 2;
1962
    int ret;
1963

    
1964
    register_ioport_read(iobase + 0x01, 5, 1,
1965
                         &fdctrl_read_port, fdctrl);
1966
    register_ioport_read(iobase + 0x07, 1, 1,
1967
                         &fdctrl_read_port, fdctrl);
1968
    register_ioport_write(iobase + 0x01, 5, 1,
1969
                          &fdctrl_write_port, fdctrl);
1970
    register_ioport_write(iobase + 0x07, 1, 1,
1971
                          &fdctrl_write_port, fdctrl);
1972
    isa_init_irq(&isa->busdev, &fdctrl->irq, isairq);
1973
    fdctrl->dma_chann = dma_chann;
1974

    
1975
    ret = fdctrl_init_common(fdctrl, iobase);
1976

    
1977
    return ret;
1978
}
1979

    
1980
static int sysbus_fdc_init1(SysBusDevice *dev)
1981
{
1982
    FDCtrlSysBus *sys = DO_UPCAST(FDCtrlSysBus, busdev, dev);
1983
    FDCtrl *fdctrl = &sys->state;
1984
    int io;
1985
    int ret;
1986

    
1987
    io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, fdctrl);
1988
    sysbus_init_mmio(dev, 0x08, io);
1989
    sysbus_init_irq(dev, &fdctrl->irq);
1990
    qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
1991
    fdctrl->dma_chann = -1;
1992

    
1993
    ret = fdctrl_init_common(fdctrl, io);
1994

    
1995
    return ret;
1996
}
1997

    
1998
static int sun4m_fdc_init1(SysBusDevice *dev)
1999
{
2000
    FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state);
2001
    int io;
2002

    
2003
    io = cpu_register_io_memory(fdctrl_mem_read_strict,
2004
                                fdctrl_mem_write_strict, fdctrl);
2005
    sysbus_init_mmio(dev, 0x08, io);
2006
    sysbus_init_irq(dev, &fdctrl->irq);
2007
    qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
2008

    
2009
    fdctrl->sun4m = 1;
2010
    return fdctrl_init_common(fdctrl, io);
2011
}
2012

    
2013
static ISADeviceInfo isa_fdc_info = {
2014
    .init = isabus_fdc_init1,
2015
    .qdev.name  = "isa-fdc",
2016
    .qdev.size  = sizeof(FDCtrlISABus),
2017
    .qdev.no_user = 1,
2018
    .qdev.reset = fdctrl_external_reset_isa,
2019
    .qdev.props = (Property[]) {
2020
        DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.drives[0].dinfo),
2021
        DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.drives[1].dinfo),
2022
        DEFINE_PROP_END_OF_LIST(),
2023
    },
2024
};
2025

    
2026
static SysBusDeviceInfo sysbus_fdc_info = {
2027
    .init = sysbus_fdc_init1,
2028
    .qdev.name  = "sysbus-fdc",
2029
    .qdev.size  = sizeof(FDCtrlSysBus),
2030
    .qdev.reset = fdctrl_external_reset_sysbus,
2031
    .qdev.props = (Property[]) {
2032
        DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.drives[0].dinfo),
2033
        DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.drives[1].dinfo),
2034
        DEFINE_PROP_END_OF_LIST(),
2035
    },
2036
};
2037

    
2038
static SysBusDeviceInfo sun4m_fdc_info = {
2039
    .init = sun4m_fdc_init1,
2040
    .qdev.name  = "SUNW,fdtwo",
2041
    .qdev.size  = sizeof(FDCtrlSysBus),
2042
    .qdev.reset = fdctrl_external_reset_sysbus,
2043
    .qdev.props = (Property[]) {
2044
        DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.drives[0].dinfo),
2045
        DEFINE_PROP_END_OF_LIST(),
2046
    },
2047
};
2048

    
2049
static void fdc_register_devices(void)
2050
{
2051
    isa_qdev_register(&isa_fdc_info);
2052
    sysbus_register_withprop(&sysbus_fdc_info);
2053
    sysbus_register_withprop(&sun4m_fdc_info);
2054
}
2055

    
2056
device_init(fdc_register_devices)