Revision 8f8e3aa4 target-arm/op_mem.h
b/target-arm/op_mem.h | ||
---|---|---|
1 | 1 |
/* ARM memory operations. */ |
2 | 2 |
|
3 |
/* Load-locked, store exclusive. */ |
|
4 |
#define EXCLUSIVE_OP(suffix, ldsuffix) \ |
|
5 |
void OPPROTO glue(op_ld##suffix##ex,MEMSUFFIX)(void) \ |
|
6 |
{ \ |
|
7 |
cpu_lock(); \ |
|
8 |
helper_mark_exclusive(env, T1); \ |
|
9 |
T0 = glue(ld##ldsuffix,MEMSUFFIX)(T1); \ |
|
10 |
cpu_unlock(); \ |
|
11 |
FORCE_RET(); \ |
|
12 |
} \ |
|
13 |
\ |
|
14 |
void OPPROTO glue(op_st##suffix##ex,MEMSUFFIX)(void) \ |
|
15 |
{ \ |
|
16 |
int failed; \ |
|
17 |
cpu_lock(); \ |
|
18 |
failed = helper_test_exclusive(env, T1); \ |
|
19 |
/* ??? Is it safe to hold the cpu lock over a store? */ \ |
|
20 |
if (!failed) { \ |
|
21 |
glue(st##suffix,MEMSUFFIX)(T1, T0); \ |
|
22 |
} \ |
|
23 |
T0 = failed; \ |
|
24 |
cpu_unlock(); \ |
|
25 |
FORCE_RET(); \ |
|
26 |
} |
|
27 |
|
|
28 |
EXCLUSIVE_OP(b, ub) |
|
29 |
EXCLUSIVE_OP(w, uw) |
|
30 |
EXCLUSIVE_OP(l, l) |
|
31 |
|
|
32 |
#undef EXCLUSIVE_OP |
|
33 |
|
|
34 |
/* Load exclusive T0:T1 from address T1. */ |
|
35 |
void OPPROTO glue(op_ldqex,MEMSUFFIX)(void) |
|
36 |
{ |
|
37 |
cpu_lock(); |
|
38 |
helper_mark_exclusive(env, T1); |
|
39 |
T0 = glue(ldl,MEMSUFFIX)(T1); |
|
40 |
T1 = glue(ldl,MEMSUFFIX)((T1 + 4)); |
|
41 |
cpu_unlock(); |
|
42 |
FORCE_RET(); |
|
43 |
} |
|
44 |
|
|
45 |
/* Store exclusive T0:T2 to address T1. */ |
|
46 |
void OPPROTO glue(op_stqex,MEMSUFFIX)(void) |
|
47 |
{ |
|
48 |
int failed; |
|
49 |
cpu_lock(); |
|
50 |
failed = helper_test_exclusive(env, T1); |
|
51 |
/* ??? Is it safe to hold the cpu lock over a store? */ |
|
52 |
if (!failed) { |
|
53 |
glue(stl,MEMSUFFIX)(T1, T0); |
|
54 |
glue(stl,MEMSUFFIX)((T1 + 4), T2); |
|
55 |
} |
|
56 |
T0 = failed; |
|
57 |
cpu_unlock(); |
|
58 |
FORCE_RET(); |
|
59 |
} |
|
60 |
|
|
61 | 3 |
/* iwMMXt load/store. Address is in T1 */ |
62 | 4 |
#define MMX_MEM_OP(name, ldname) \ |
63 | 5 |
void OPPROTO glue(op_iwmmxt_ld##name,MEMSUFFIX)(void) \ |
Also available in: Unified diff