Revision 9143e598 target-sparc/cpu.h
b/target-sparc/cpu.h | ||
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127 | 127 |
#define FSR_FTT_MASK (FSR_FTT2 | FSR_FTT1 | FSR_FTT0) |
128 | 128 |
#define FSR_FTT_IEEE_EXCP (1 << 14) |
129 | 129 |
#define FSR_FTT_UNIMPFPOP (3 << 14) |
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#define FSR_FTT_SEQ_ERROR (4 << 14) |
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130 | 131 |
#define FSR_FTT_INVAL_FPR (6 << 14) |
131 | 132 |
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#define FSR_FCC1 (1<<11) |
... | ... | |
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#else |
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#define GET_FSR32(env) (env->fsr) |
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#define PUT_FSR32(env, val) do { uint32_t _tmp = val; \ |
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env->fsr = (_tmp & 0xcfc1ffff) | (env->fsr & 0x000e0000); \
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env->fsr = (_tmp & 0xcfc1dfff) | (env->fsr & 0x000e0000); \
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} while (0) |
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#endif |
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