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# Date Author Comment
9168b3a5 06/02/2010 11:03 pm Igor V. Kovalenko

sparc64: fix tag access register on mmu traps

- set mmu tag access register on FAULT and PROT traps as well

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

da7ed379 05/30/2010 12:22 am Artyom Tarasenko

sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)

SuperSPARC MMU Breakpoint Action register is used by OBP at boot

The patch allows booting Solaris and some other OS with
SPARCStation-20 OBP.

Signed-off-by: Artyom Tarasenko <>...

03ae77d6 05/29/2010 01:20 pm Blue Swirl

sparc64: fix user emulator build

Accesses with _nucleus prefix are not available when building user
emulators:
CC sparc64-linux-user/op_helper.o
cc1: warnings being treated as errors
/src/qemu/target-sparc/op_helper.c: In function 'helper_ldda_asi':...

54a3c0f0 05/29/2010 10:26 am Igor V. Kovalenko

sparc64: fix 128-bit atomic load from nucleus context v1

- change 128-bit atomic loads to reference nucleus context
v0->v1: dropped disassembler change
Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

664a65b0 05/22/2010 03:52 pm Igor V. Kovalenko

sparc64: flush translations on mmu context change

- two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers
using value of DMMU primary and secondary context registers, so we need to
flush softmmu translations when context registers are changed...

9fd1ae3a 05/22/2010 03:51 pm Igor V. Kovalenko

sparc64: fix mmu context at trap levels above zero

- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero
- cpu_get_tb_cpu_state: store trap level and primary context in flags
this allows to restart code translation when address translation is changed...

e2129586 05/22/2010 03:50 pm Igor V. Kovalenko

sparc64: fix dump_mmu to look for global bit in tte value instead of tag

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

2aae2b8e 05/22/2010 03:48 pm Igor V. Kovalenko

sparc64: fix pstate privilege bits

- refactor code to handle hpstate only if available for current cpu
- conditionally set hypervisor bit in hpstate register
- reorder softmmu indices so user accessable ones go first, translation context
macros supervisor() and hypervisor() adjusted as well...

b8e9fc06 05/22/2010 03:34 pm Igor V. Kovalenko

sparc64: generate data access exception on RW violation

- separate PRIV and PROT handling
- DPRINTF_MMU macro to clean up debug code
- dump mmu_idx, trap level and mmu context registers
along with address translation values

Signed-off-by: Igor V. Kovalenko <>...

0bfcd599 05/22/2010 11:02 am Blue Swirl

Fix %lld or %llx printf format use

Signed-off-by: Blue Swirl <>

70c48285 05/20/2010 10:58 pm Richard Henderson

target-sparc: Inline some generation of carry for ADDX/SUBX.

Computing carry is trivial for some inputs. By avoiding an
external function call, we generate near-optimal code for
the common cases of add+addx (double-word arithmetic) and
cmp+addx (a setcc pattern)....

5a4bb580 05/19/2010 10:04 pm Richard Henderson

target-sparc: Simplify ICC generation.

Use int32 types instead of target_ulong when computing ICC. This
simplifies the generated code for 32-bit host and 64-bit guest.
Use the same simplified expressions for ICC as were already used
for XCC in carry flag generation....

4c1a0d82 05/19/2010 10:03 pm Richard Henderson

target-sparc: Fix compilation with --enable-debug.

Return a target_ulong from compute_C_icc to match the width of the users.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

21ffd181 05/16/2010 11:33 am Blue Swirl

sparc: move DT and QT defines to op_helper.c

Signed-off-by: Blue Swirl <>

88c8e03f 05/16/2010 10:54 am Igor V. Kovalenko

sparc64: fix TT_WOTHER value

- fix off by one error in spill trap number bit for other window (must be bit 5)
- fixes invalid instruction issue with HelenOS

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

170f4c55 05/16/2010 10:54 am Igor V. Kovalenko

sparc64: fix mmu demap operand typo

- must use store address operand to demap, not store value

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

113c6106 05/12/2010 10:20 pm Stefan Weil

target-sparc: Fix wrong printf argument

cpu_get_ccr() returns a target_ulong, so a type cast is needed to avoid
wrong output on big endian hosts. We could also use TARGET_FMT_lx,
but that would print 8 instead of 2 digits.

Cc: Blue Swirl <>...

5a834bb4 05/09/2010 11:19 pm Blue Swirl

sparc: Fix lazy flag calculation on interrupts, refactor

Recalculate Sparc64 CPU flags on interrupts, otherwise some earlier
flags could be stored to pstate.

Refactor PSR/CCR/CWP handling: concentrate the actual
functions to op_helper.c.

Thanks to Igor Kovalenko for reporting....

275ea265 05/09/2010 06:40 pm Blue Swirl

sparc: lazy C flag calculation

Calculate only the carry flag for ADDX/SUBX instead of full
set of flags.

Thanks to Igor Kovalenko for spotting a bug with an earlier
version.

Signed-off-by: Blue Swirl <>

44505216 05/07/2010 07:14 pm Blue Swirl

sparc64: fix build with older gccs

Fix errors missed in 2065061ede22d401aae2ce995c3af54db9d28639:
CC sparc64-softmmu/helper.o
cc1: warnings being treated as errors
/src/qemu/target-sparc/helper.c: In function 'get_physical_address':
/src/qemu/target-sparc/helper.c:426: warning: 'context' may be used uninitialized in this function...

2065061e 05/06/2010 11:14 pm Igor V. Kovalenko

sparc64: handle asi referencing nucleus and secondary MMU contexts

- increase max supported MMU modes to 6
- handle nucleus context asi
- handle secondary context asi
- handle non-faulting loads from secondary context

Signed-off-by: Igor V. Kovalenko <>...

299b520c 05/06/2010 11:13 pm Igor V. Kovalenko

sparc64: implement global translation table entries v1

- match global tte against any context
- show global tte in MMU dump

v0->v1: added default case to switch statement in demap_tlb
- should fix gcc warning about uninitialized context variable

Signed-off-by: Igor V. Kovalenko <>...

060718c1 04/26/2010 08:23 pm Richard Henderson

target-sparc: Fix -singlestep.

Single-stepping was not properly updating npc, resulting in some
instructions being executed twice. In addition, we were emitting
dead code at the end of the TB.

Fix both by teaching gen_goto_tb to avoid goto_tb for single-step...

41db525e 04/23/2010 09:38 pm Richard Henderson

target-sparc: Fix address masking in ldqf and stqf.

Use address_mask on both addr and addr+8 in both these routines,
rather than explicit masking with 0xffffffff.

Reformulate address_mask to return a result, rather than masking
a pass-by-reference argument....

6ad6135d 04/18/2010 05:22 pm Blue Swirl

Fix harmless if statements with empty body, spotted by clang

These clang errors are harmless but worth fixing:
CC ppc-softmmu/usb-ohci.o
/src/qemu/hw/usb-ohci.c:1104:59: error: if statement has empty body [-Wempty-body]
ohci->ctrl_head, ohci->ctrl_cur);...

42a8aa83 04/17/2010 07:25 pm Richard Henderson

target-sparc: Free instruction temporaries.

Rather than creating new temporaries for constants, use the
ones created in disas_sparc_insn. Remember the temps created
there so that they can be freed at the end of the function.

Profile data collected by TCG while booting sparc-test kernel:...

058ed88c 04/17/2010 07:25 pm Richard Henderson

target-sparc: Fix TARGET_{PHYS,VIRT}_ADDR_SPACE_BITS.

The 32 and 64-bit definitions were swapped in the ifdef.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

cca1d527 04/17/2010 07:25 pm Blue Swirl

Sparc: fix PC/NPC during FPU traps

All FPU instructions can trap, so save PC/NPC state before
executing them.

Signed-off-by: Blue Swirl <>

d7da2a10 04/11/2010 10:47 pm Blue Swirl

Sparc: fix exceptions in delay slot

Fix a case where an exception happens with the
instruction in the delay slot.

Recovery of branch condition in the exception handling
code was not converted to TCG. Because the condition
was bogus, wrong NPC could be selected from the two...

1a7ff922 04/08/2010 10:34 pm Paolo Bonzini

remove TARGET_* defines from translate-all.c

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>

d4c430a8 03/17/2010 04:44 am Paul Brook

Large page TLB flush

QEMU uses a fixed page size for the CPU TLB. If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.

When the guest invalidates the TLB by virtual address we must invalidate...

3c7b48b7 03/12/2010 08:44 pm Paul Brook

Target specific usermode cleanup

Disable various target specific code that is only relevant to system emulation.

Signed-off-by: Paul Brook <>

4fcc562b 03/12/2010 08:34 pm Paul Brook

Remove cpu_get_phys_page_debug from userspace emulation

cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <>

52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....

bc57c114 02/25/2010 08:26 pm Stefan Weil

target-sparc: fix --enable-debug build for 64 bit host

b551ec04ca45d1925417dd2ec7c1b7f115c84f1d fixed
the compilation for 32 bit hosts, but introduced
a new error for 64 bit hosts:

tcg_temp_new_ptr needs a matching tcg_temp_free_ptr.

Signed-off-by: Stefan Weil <>...

b551ec04 02/20/2010 01:09 pm Jay Foad

target-sparc: fix --enable-debug build

Use 32-bit arithmetic for the address offset calculation to fix a
build failure on 32-bit hosts.

Signed-off-by: Jay Foad <>
Signed-off-by: Blue Swirl <>

698235aa 01/31/2010 09:49 am Artyom Tarasenko

sparc32 don't mark page dirty when failing

if the access check fails, the page can not be modified
and shouldn't be marked dirty.
The patch fixes the "hsfs_putpage: dirty HSFS page"
error in Solaris guests.

Signed-off-by: Artyom Tarasenko <>...

8f4efc55 01/27/2010 11:21 pm Igor V. Kovalenko

sparc64: reimplement tick timers v4

sparc64 timer has tick counter which can be set and read,
and tick compare value used as deadline to fire timer interrupt.
The timer is not used as periodic timer, instead deadline
is set each time new timer interrupt is needed....

4f690853 01/27/2010 07:47 pm Igor V. Kovalenko

sparc64: correct write extra bits to cwp

- correctly fit to cwp if provided window number is out of range

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

15e7c451 01/23/2010 10:11 am Artyom Tarasenko

sparc32 fix np dereference in do_unassigned_access

fix a potential null pointer dereference introduced in
commit 576c2cdc767ab9e2dc038fa4c99f22e53287a3de

Signed-off-by: Artyom Tarasenko <>
Signed-off-by: Blue Swirl <>

49a945a3 01/20/2010 12:31 am Paolo Bonzini

kill regs_to_env and env_to_regs

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

43bb98bf 01/17/2010 06:51 pm Blue Swirl

Sparc: improve CPU register dump

Common: * Remove unnecessary 0x prefix * Print %y * Fix NZVC flag print order to match CPU bit order

Sparc64 specific: * Print registers without line wrapping * Print %f40-%f63 * Pretty print CCR flags * Print %fsr and %fprs in full precision...

576c2cdc 01/15/2010 11:33 pm Artyom Tarasenko

sparc32 do_unassigned_access overhaul v2

According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache Controller
User's Manual":

1. "A lower priority fault may not overwrite the
MFSR status of a higher priority fault."
2. The MFAR is overwritten according to the policy defined for the MFSR...

701eed4b 01/13/2010 08:49 pm Blue Swirl

Sparc32: remove unused variable, spotted by clang

Signed-off-by: Blue Swirl <>

d532b26c 01/08/2010 07:25 pm Igor V. Kovalenko

sparc64: interrupt trap handling

cpu_check_irqs
- handle SOFTINT register TICK and STICK timer bits
- only check interrupt levels greater than PIL value
- handle preemption by higher level traps

cpu_exec
- handle CPU_INTERRUPT_HARD only if interrupts are enabled...

2df6c2d0 01/08/2010 07:16 pm Igor V. Kovalenko

sparc64: move cpu_interrupts_enabled to cpu.h

- to be used by cpu_check_irqs

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

709f2c1b 01/08/2010 07:15 pm Igor V. Kovalenko

sparc64: add macros to deal with softint and timer interrupt

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

4dc28134 01/08/2010 07:15 pm Igor V. Kovalenko

sparc64: check for pending irq when pil, pstate or softint is changed

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

1fae7b70 01/08/2010 07:14 pm Igor V. Kovalenko

sparc64: use helper_wrpil to check pending irq on write

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

68e8a3f0 01/08/2010 07:13 pm Igor V. Kovalenko

sparc64: add PIL to cpu state dump

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

7e8695ed 01/08/2010 07:12 pm Igor V. Kovalenko

sparc64: trace pstate and global register set changes

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

d780a466 01/08/2010 07:12 pm Igor V. Kovalenko

sparc64: change_pstate should have 32bit argument

- pstate is 32bit variable, no need to pass 64bit value around

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

95372a39 01/07/2010 10:02 pm Blue Swirl

Sparc32: clear exception_index with -1 value

See also 821b19fe923ac49a24cdb4af902584fdd019cee6.

Spotted by Artyom Tarasenko and Igor Kovalenko.

Signed-off-by: Blue Swirl <>

821b19fe 01/06/2010 07:35 pm Igor V. Kovalenko

sparc64: clear exception_index with -1 value

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

dffbe217 01/03/2010 02:19 pm Igor V. Kovalenko

pass env to raise_exception if called outside of op_helper code

- this fixes stepping with gdb, where do_unassigned_access
may be called from gdb handler, outside of generated code

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

87f6d3f6 01/03/2010 02:16 pm Igor V. Kovalenko

sparc64: switch to MMU global registers in more MMU related traps

- extended range of MMU related traps which use MMU global registers,
as listed in Ultrasparc-IIi document
- no visible changes, since emulation do not cause added traps

Signed-off-by: Igor V. Kovalenko <>...

2a90358f 12/05/2009 01:14 pm Blue Swirl

Sparc64: handle MMU global bit and nucleus context

Signed-off-by: Blue Swirl <>

31a68d57 12/04/2009 06:16 pm Blue Swirl

Sparc64: fix compilation with DEBUG_MMU

Signed-off-by: Blue Swirl <>

b55a37c9 11/07/2009 12:37 pm Blue Swirl

user: move CPU reset call to main.c for x86/PPC/Sparc

Signed-off-by: Blue Swirl <>

a01d6ef4 11/07/2009 10:55 am Blue Swirl

sparc32 (mostly): remove unneeded calls to device reset

Signed-off-by: Blue Swirl <>

3e6ba503 11/04/2009 09:38 pm Artyom Tarasenko

Sparc: fix carry flag handling (Solaris bootblk fix)

The page 108 of the SPARC Version 8 Architecture Manual describes
that addcc and addxcc shall compute carry flag the same way.
The page 110 claims the same about subcc and subxcc instructions.
This patch fixes carry computation in corner cases and removes redundant code....

3723cd09 10/13/2009 07:48 pm Igor V. Kovalenko

sparc64: fix done instruction pc

Fix done instruction to resume with pc=tnpc, npc=tnpc+4

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

c227f099 10/02/2009 12:12 am Anthony Liguori

Revert "Get rid of _t suffix"

In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem. Something
like this must be presented on the list first so people can provide input...

99a0949b 10/01/2009 09:45 pm malc

Get rid of _t suffix

Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <>

01b5d4e5 09/23/2009 11:00 pm Igor V. Kovalenko

sparc64-8bit-asi

Sparc64 alternate space load/store helpers expect 8 bit ASI value,
while wrasi implementation sign-extends ASI operand causing
for example 0x80 to appear as 0xFFFFFF80. Resulting value falls
out of switch in helpers and causes obscure load/store faults....

72cf2d4f 09/12/2009 10:36 am Blue Swirl

Fix sys-queue.h conflict for good

Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...

0b5c1ce8 08/24/2009 04:21 pm Nathan Froyd

cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal

handle_cpu_signal is very nearly copy-paste code for each target, with a
few minor variations. This patch sets up appropriate defaults for a
generic handle_cpu_signal and provides overrides for particular targets...

4c6aa085 08/22/2009 02:54 pm Blue Swirl

sparc32 remove an unnecessary cpu irq set

Signed-off-by: Artyom Tarasenko <>
Signed-off-by: Blue Swirl <>

c27e2752 08/22/2009 02:46 pm Blue Swirl

Sparc32/64: fix jmpl followed by branch

Fix a case where 'jmpl' instruction followed by a branch instruction was
handled incorrectly.

Signed-off-by: Blue Swirl <>

6b743278 08/18/2009 09:04 pm Blue Swirl

Sparc32/64: Fix user emulator breakage

Signed-off-by: Blue Swirl <>

cfa90513 08/15/2009 07:52 pm Blue Swirl

Fix desynchronization of condition code state when a memory access traps

Signed-off-by: Blue Swirl <>

8194f35a 08/04/2009 11:22 pm Igor Kovalenko

Sparc64: replace tsptr with helper routine

tl and tsptr of members sparc64 cpu state must be changed
simultaneously to keep trap state window in sync with current
trap level. Currently translation of store to tl does not change
tsptr, which leads to corrupt trap state on corresponding...

14ed7adc 07/31/2009 09:48 am Igor Kovalenko

sparc64 flush pending conditional evaluations before exposing cpu state

If translation block is interrupted by e.g. mmu exception
we need to compute conditional flags for inclusion into
saved cpu state. Otherwise after return from trap
conditional instructions would use stale psr/xcc data....

e2542fe2 07/27/2009 10:09 pm Juan Quintela

rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

f707726e 07/27/2009 08:43 am Igor Kovalenko

sparc64 really implement itlb/dtlb automatic replacement writes

- implement "used" bit in tlb translation entry
- mark tlb entry used if qemu code/data translation succeeds
- fold i/d mmu replacement writes code into replace_tlb_1bit_lru which
adds 1bit lru replacement algorithm; previously code tried to replace...

6e8e7d4c 07/27/2009 08:43 am Igor Kovalenko

sparc64 name mmu registers and general cleanup

- add names to mmu registers, this helps understanding the code which
uses/modifies them.
- fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries
- extract demap_tlb routine (code duplication)...

0bf9e31a 07/20/2009 08:19 pm Blue Swirl

Fix most warnings (errors with -Werror) when debugging is enabled

I used the following command to enable debugging:
perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * /* *//*

Signed-off-by: Blue Swirl <>

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

5210977a 07/12/2009 11:46 am Igor Kovalenko

sparc64: trap handling corrections

On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<> wrote:

On 7/12/09, Igor Kovalenko <> wrote:

Good trap handling is required to process interrupts.
 This patch fixes the following:...

5b0f0bec 07/12/2009 10:44 am Igor Kovalenko

sparc64: fix helper_st_asi little endian case typo

On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<> wrote:

On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote:

It is clear that intention is to byte-swap value to be written, not...

e8807b14 07/12/2009 10:41 am Igor Kovalenko

sparc64: mmu bypass mode correction

This Implement physical address truncation in mmu bypass mode.
IMMU bypass is also active when cpu enters RED_STATE

Signed-off-by:

--
Kind regards,
Igor V. Kovalenko

536ba015 07/12/2009 10:41 am Igor Kovalenko

sparc64: unify mmu tag matching code

This patch extracts common part of sparc64 tag
matching code used by IMMU and DMMU lookups.

Signed-off-by:

--
Kind regards,
Igor V. Kovalenko

25517f99 06/06/2009 04:54 am Paul Brook

Use correct type for SPARC cpu_cc_op

Signed-off-by: Paul Brook <>

f80f9ec9 05/21/2009 04:47 pm Anthony Liguori

Convert machine registration to use module init functions

This cleans up quite a lot of #ifdefs, extern variables, and other ugliness.

Signed-off-by: Anthony Liguori <>

1ad2134f 05/19/2009 06:17 pm Paul Brook

Hardware convenience library

The only target dependency for most hardware is sizeof(target_phys_addr_t).
Build these files into a convenience library, and use that instead of
building for every target.

Remove and poison various target specific macros to avoid bogus target...

55616505 05/13/2009 10:54 pm Paul Brook

Include assert.h from qemu-common.h

Include assert.h from qemu-common.h and remove other direct uses.
cpu-all.h still need to include it because of the dyngen-exec.h hacks

Signed-off-by: Paul Brook <>

001faf32 05/13/2009 08:53 pm Blue Swirl

Replace gcc variadic macro extension with C99 version

Signed-off-by: Blue Swirl <>

d084469c 05/10/2009 10:43 am Blue Swirl

Convert mulscc

Signed-off-by: Blue Swirl <>

6c78ea32 05/10/2009 10:42 am Blue Swirl

Convert udiv/sdiv

Signed-off-by: Blue Swirl <>

3b2d1e92 05/10/2009 10:38 am Blue Swirl

Convert tagged ops

Signed-off-by: Blue Swirl <>

38482a77 05/10/2009 10:38 am Blue Swirl

Convert logical operations and umul/smul

Signed-off-by: Blue Swirl <>

d4b0d468 05/10/2009 10:38 am Blue Swirl

Convert sub

Signed-off-by: Blue Swirl <>

2ca1d92b 05/10/2009 10:38 am Blue Swirl

Convert subx

Signed-off-by: Blue Swirl <>

789c91ef 05/10/2009 10:19 am Blue Swirl

Convert addx

Signed-off-by: Blue Swirl <>

bdf9f35d 05/10/2009 10:19 am Blue Swirl

Convert add

Signed-off-by: Blue Swirl <>

8393617c 05/10/2009 10:19 am Blue Swirl

Use dynamical computation for condition codes

Signed-off-by: Blue Swirl <>

719f66a7 05/03/2009 09:51 pm Blue Swirl

Optimize cmp x, 0 case

Signed-off-by: Blue Swirl <>

dc1a6971 05/03/2009 09:51 pm Blue Swirl

Reindent

Signed-off-by: Blue Swirl <>

b89e94af 05/02/2009 11:19 pm Blue Swirl

Improve instruction name comments for easier searching

Signed-off-by: Blue Swirl <>

7ab463cb 05/02/2009 10:52 pm Blue Swirl

Clarify: dmmuregs1 is not a typo

Signed-off-by: Blue Swirl <>