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# Date Author Comment
9fd1ae3a 05/22/2010 03:51 pm Igor V. Kovalenko

sparc64: fix mmu context at trap levels above zero

- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero
- cpu_get_tb_cpu_state: store trap level and primary context in flags
this allows to restart code translation when address translation is changed...

2aae2b8e 05/22/2010 03:48 pm Igor V. Kovalenko

sparc64: fix pstate privilege bits

- refactor code to handle hpstate only if available for current cpu
- conditionally set hypervisor bit in hpstate register
- reorder softmmu indices so user accessable ones go first, translation context
macros supervisor() and hypervisor() adjusted as well...

88c8e03f 05/16/2010 10:54 am Igor V. Kovalenko

sparc64: fix TT_WOTHER value

- fix off by one error in spill trap number bit for other window (must be bit 5)
- fixes invalid instruction issue with HelenOS

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

5a834bb4 05/09/2010 11:19 pm Blue Swirl

sparc: Fix lazy flag calculation on interrupts, refactor

Recalculate Sparc64 CPU flags on interrupts, otherwise some earlier
flags could be stored to pstate.

Refactor PSR/CCR/CWP handling: concentrate the actual
functions to op_helper.c.

Thanks to Igor Kovalenko for reporting....

2065061e 05/06/2010 11:14 pm Igor V. Kovalenko

sparc64: handle asi referencing nucleus and secondary MMU contexts

- increase max supported MMU modes to 6
- handle nucleus context asi
- handle secondary context asi
- handle non-faulting loads from secondary context

Signed-off-by: Igor V. Kovalenko <>...

299b520c 05/06/2010 11:13 pm Igor V. Kovalenko

sparc64: implement global translation table entries v1

- match global tte against any context
- show global tte in MMU dump

v0->v1: added default case to switch statement in demap_tlb
- should fix gcc warning about uninitialized context variable

Signed-off-by: Igor V. Kovalenko <>...

058ed88c 04/17/2010 07:25 pm Richard Henderson

target-sparc: Fix TARGET_{PHYS,VIRT}_ADDR_SPACE_BITS.

The 32 and 64-bit definitions were swapped in the ifdef.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

3c7b48b7 03/12/2010 08:44 pm Paul Brook

Target specific usermode cleanup

Disable various target specific code that is only relevant to system emulation.

Signed-off-by: Paul Brook <>

52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....

8f4efc55 01/27/2010 11:21 pm Igor V. Kovalenko

sparc64: reimplement tick timers v4

sparc64 timer has tick counter which can be set and read,
and tick compare value used as deadline to fire timer interrupt.
The timer is not used as periodic timer, instead deadline
is set each time new timer interrupt is needed....

4f690853 01/27/2010 07:47 pm Igor V. Kovalenko

sparc64: correct write extra bits to cwp

- correctly fit to cwp if provided window number is out of range

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

d532b26c 01/08/2010 07:25 pm Igor V. Kovalenko

sparc64: interrupt trap handling

cpu_check_irqs
- handle SOFTINT register TICK and STICK timer bits
- only check interrupt levels greater than PIL value
- handle preemption by higher level traps

cpu_exec
- handle CPU_INTERRUPT_HARD only if interrupts are enabled...

2df6c2d0 01/08/2010 07:16 pm Igor V. Kovalenko

sparc64: move cpu_interrupts_enabled to cpu.h

- to be used by cpu_check_irqs

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

709f2c1b 01/08/2010 07:15 pm Igor V. Kovalenko

sparc64: add macros to deal with softint and timer interrupt

Signed-off-by: Igor V. Kovalenko <>
Signed-off-by: Blue Swirl <>

2a90358f 12/05/2009 01:14 pm Blue Swirl

Sparc64: handle MMU global bit and nucleus context

Signed-off-by: Blue Swirl <>

c227f099 10/02/2009 12:12 am Anthony Liguori

Revert "Get rid of _t suffix"

In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem. Something
like this must be presented on the list first so people can provide input...

99a0949b 10/01/2009 09:45 pm malc

Get rid of _t suffix

Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <>

0b5c1ce8 08/24/2009 04:21 pm Nathan Froyd

cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal

handle_cpu_signal is very nearly copy-paste code for each target, with a
few minor variations. This patch sets up appropriate defaults for a
generic handle_cpu_signal and provides overrides for particular targets...

4c6aa085 08/22/2009 02:54 pm Blue Swirl

sparc32 remove an unnecessary cpu irq set

Signed-off-by: Artyom Tarasenko <>
Signed-off-by: Blue Swirl <>

8194f35a 08/04/2009 11:22 pm Igor Kovalenko

Sparc64: replace tsptr with helper routine

tl and tsptr of members sparc64 cpu state must be changed
simultaneously to keep trap state window in sync with current
trap level. Currently translation of store to tl does not change
tsptr, which leads to corrupt trap state on corresponding...

f707726e 07/27/2009 08:43 am Igor Kovalenko

sparc64 really implement itlb/dtlb automatic replacement writes

- implement "used" bit in tlb translation entry
- mark tlb entry used if qemu code/data translation succeeds
- fold i/d mmu replacement writes code into replace_tlb_1bit_lru which
adds 1bit lru replacement algorithm; previously code tried to replace...

6e8e7d4c 07/27/2009 08:43 am Igor Kovalenko

sparc64 name mmu registers and general cleanup

- add names to mmu registers, this helps understanding the code which
uses/modifies them.
- fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries
- extract demap_tlb routine (code duplication)...

5210977a 07/12/2009 11:46 am Igor Kovalenko

sparc64: trap handling corrections

On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<> wrote:

On 7/12/09, Igor Kovalenko <> wrote:

Good trap handling is required to process interrupts.
 This patch fixes the following:...

1ad2134f 05/19/2009 06:17 pm Paul Brook

Hardware convenience library

The only target dependency for most hardware is sizeof(target_phys_addr_t).
Build these files into a convenience library, and use that instead of
building for every target.

Remove and poison various target specific macros to avoid bogus target...

8393617c 05/10/2009 10:19 am Blue Swirl

Use dynamical computation for condition codes

Signed-off-by: Blue Swirl <>

c2764719 03/07/2009 05:24 pm pbrook

The _exit syscall is used for both thread termination in NPTL applications,
and process termination in legacy applications. Try to guess which we want
based on the presence of multiple threads.

Also implement locking when modifying the CPU list.

Signed-off-by: Paul Brook <>...

4017190e 12/23/2008 05:30 pm blueswir1

Add SuperSPARC MMU breakpoint registers (Robert Reif)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6125 c046a42c-6fe2-441c-8c8c-71466251a162

963262de 12/23/2008 05:06 pm blueswir1

Better SuperSPARC emulation (Robert Reif)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6123 c046a42c-6fe2-441c-8c8c-71466251a162

8fa211e8 12/23/2008 10:47 am blueswir1

Implement tick interrupt disable bits

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6122 c046a42c-6fe2-441c-8c8c-71466251a162

6b917547 11/18/2008 09:46 pm aliguori

Refactor translation block CPU state handling (Jan Kiszka)

This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()...

622ed360 11/18/2008 09:36 pm aliguori

Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)

as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162

e18231a3 10/06/2008 09:46 pm blueswir1

Show size for unassigned accesses (Robert Reif)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162

f4b1a842 10/03/2008 10:04 pm blueswir1

Rearrange tick functions

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162

48585ec5 10/03/2008 10:02 pm blueswir1

Fix missing prototype warnings by moving declarations

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5407 c046a42c-6fe2-441c-8c8c-71466251a162

9d926598 09/22/2008 10:50 pm blueswir1

Add software and timer interrupt support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162

f0d5e471 09/20/2008 12:05 pm blueswir1

Move signal handler prototype back to cpu.h

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162

d84763bc 09/10/2008 11:09 pm blueswir1

Convert rest of ops using float32 to TCG, remove FT0 and FT1

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162

3a3b925d 09/09/2008 10:02 pm blueswir1

Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162

47ad35f1 09/06/2008 08:50 pm blueswir1

Silence gcc warning about constant overflow

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162

ba6a9d8c 08/30/2008 12:03 am blueswir1

Fix FCC handling for Sparc64 target, initial patch by Vince Weaver

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162

91736d37 08/29/2008 11:50 pm blueswir1

Fix Sparc64 boot on i386 host:
- move do_interrupt() back to op_helper.c
- move non-helper prototypes from helper.h to exec.h
- move some prototypes from cpu.h to exec.h
- do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
but instead provide inline functions...

5578ceab 08/21/2008 08:33 pm blueswir1

Use initial CPU definition structure for some CPU fields instead of copying
them around, based on patch by Luis Pureza.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162

c19148bd 07/25/2008 10:42 am blueswir1

Make MAXTL dynamic, bounds check tl when indexing

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162

0b8f1b10 07/24/2008 02:28 pm blueswir1

Sparc32: save/load all MMU registers, Sparc64: add CPU save/load

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4938 c046a42c-6fe2-441c-8c8c-71466251a162

74b9decc 07/21/2008 09:43 pm blueswir1

Use MMU globals for some MMU traps

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4918 c046a42c-6fe2-441c-8c8c-71466251a162

fb79ceb9 07/20/2008 09:22 pm blueswir1

Make UA200x features selectable, add MMU types

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162

e19e4efe 07/16/2008 07:55 pm blueswir1

Fix MMU miss traps

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4880 c046a42c-6fe2-441c-8c8c-71466251a162

9656f324 07/01/2008 11:01 pm pbrook

Move interrupt_request and user_mode_only to common cpu state.
Save and restore env->interrupt_request and env->halted.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162

b3c7724c 06/30/2008 07:31 pm pbrook

Move CPU save/load registration to common code.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162

2e70f6ef 06/29/2008 04:03 am pbrook

Add instruction counter.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162

0bbd4a0d 06/23/2008 07:58 pm blueswir1

Fix compiler warning (Jan Kiszka)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4781 c046a42c-6fe2-441c-8c8c-71466251a162

1a14026e 06/07/2008 11:07 am blueswir1

Allow NWINDOWS selection (CPU feature with model specific defaults)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162

f8ed7070 05/30/2008 08:54 pm pbrook

Fix typo.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162

6e68e076 05/30/2008 08:22 pm pbrook

Move clone() register setup to target specific code. Handle fork-like clone.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162

e30b4678 05/29/2008 09:20 pm blueswir1

MicroSparc I didn't have fsmuld op

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162

9133e39b 05/29/2008 01:08 pm bellard

Push common interrupt variables to cpu-defs.h (Glauber Costa)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162

ce5232c5 05/28/2008 08:14 pm bellard

moved halted field to CPU_COMMON

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162

77f193da 05/12/2008 07:13 pm blueswir1

Wrap long lines

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162

c5adf6a8 05/10/2008 03:25 pm blueswir1

Remove duplicated field

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4411 c046a42c-6fe2-441c-8c8c-71466251a162

7c60cc4b 05/10/2008 01:58 pm bellard

suppressed fixed registers

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162

22548760 05/10/2008 01:12 pm blueswir1

Fix compiler warnings

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162

64a88d5d 05/09/2008 11:13 pm blueswir1

CPU feature selection support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162

7fa76c0b 05/04/2008 02:58 pm blueswir1

Complete the TCG conversion

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162

4b8b8b76 04/23/2008 08:12 pm blueswir1

Document the shift values

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4243 c046a42c-6fe2-441c-8c8c-71466251a162

c48fcb47 03/29/2008 05:46 pm blueswir1

Move CPU stuff unrelated to translation to helper.c

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4133 c046a42c-6fe2-441c-8c8c-71466251a162

d9bdab86 03/16/2008 09:22 pm blueswir1

Convert mulscc to TCG, add cc_src2

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4075 c046a42c-6fe2-441c-8c8c-71466251a162

dc99a3f2 03/13/2008 10:45 pm blueswir1

Convert condition code changing versions of add, sub, logic, and div to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162

134d77a1 03/06/2008 10:09 pm blueswir1

Convert exception ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162

375ee38b 03/05/2008 07:59 pm blueswir1

Convert Sparc64 trap state ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162

ccd4a219 03/02/2008 08:28 pm blueswir1

Convert tick operations to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162

9e31b9e2 02/14/2008 07:46 pm blueswir1

Fix remote debugger memory access problems reported by Matthias Stein

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162

3deaeab7 02/11/2008 08:27 pm blueswir1

Sparc32 MMU register fixes (Robert Reif)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162

3ebf5aaf 11/28/2007 10:54 pm blueswir1

Use slavio base as boot prom address, rearrange sun4m init code

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3747 c046a42c-6fe2-441c-8c8c-71466251a162

1f587329 11/25/2007 08:40 pm blueswir1

128-bit float support for user mode

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162

3dd9a152 11/25/2007 02:43 pm blueswir1

More MMU registers (Robert Reif)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162

aaed909a 11/10/2007 05:15 pm bellard

added cpu_model parameter to cpu_init()

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162

6d5f237a 11/07/2007 07:03 pm blueswir1

CPU specific boot mode (Robert Reif)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162

6f27aba6 10/14/2007 08:07 pm blueswir1

Sparc64 hypervisor mode

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162

952a328f 10/14/2007 07:29 pm blueswir1

SuperSparc MXCC support (Robert Reif)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162

6ebbf390 10/14/2007 10:07 am j_mayer

Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions....

c732abe2 10/12/2007 09:47 am j_mayer

Unify '-cpu ?' option.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162

198a74de 09/27/2007 07:44 pm ths

Move get_sp_from_cpustate from cpu.h to target_signal.h.
Enable sigaltstack processing for more architectures.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162

a04e134a 09/27/2007 04:57 pm ths

linux-user sigaltstack() syscall, by Thayne Harbaugh.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162

40ce0a9a 09/24/2007 10:44 pm blueswir1

CPU boot mode

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162

0f8a249a 09/20/2007 05:54 pm blueswir1

Detabify

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162

5fafdf24 09/17/2007 12:08 am ths

find -type f | xargs sed -i 's/[\t ]$//g' # on most files

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162

327ac2e7 08/04/2007 01:50 pm blueswir1

Fix Sparc32 interrupt handling

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3110 c046a42c-6fe2-441c-8c8c-71466251a162

8f1f22f6 07/08/2007 10:51 pm blueswir1

Fix retry and done ops, trap handling

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3055 c046a42c-6fe2-441c-8c8c-71466251a162

17d996e1 07/07/2007 11:53 pm blueswir1

Report normalised CWP values to userland and GDB, not internal representation

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3052 c046a42c-6fe2-441c-8c8c-71466251a162

6ef905f6 07/07/2007 11:48 pm blueswir1

Fix wrong number of clean/saveable windows, match Linux startup register values

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3050 c046a42c-6fe2-441c-8c8c-71466251a162

33b37802 07/07/2007 11:44 pm blueswir1

Fix Sparc64 page size

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3047 c046a42c-6fe2-441c-8c8c-71466251a162

9467d44c 06/04/2007 12:02 am ths

Move target-specific defines to the target directories.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162

92b72cbc 06/01/2007 07:56 pm blueswir1

Enable 36-bit physical address space also on 32-bit hosts

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2914 c046a42c-6fe2-441c-8c8c-71466251a162

1b2e93c1 05/27/2007 10:36 pm blueswir1

Separate fault for code access to unassigned memory

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2876 c046a42c-6fe2-441c-8c8c-71466251a162

20c9f095 05/25/2007 09:50 pm blueswir1

Implement Sparc64 CPU timers using ptimers

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2860 c046a42c-6fe2-441c-8c8c-71466251a162

5dcb6b91 05/19/2007 03:58 pm blueswir1

Use full 36-bit physical address space on SS10

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162

6c36d3fa 05/17/2007 10:30 pm blueswir1

Enable faults for unassigned memory accesses and unimplemented ASIs

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2824 c046a42c-6fe2-441c-8c8c-71466251a162

b4f0a316 05/06/2007 08:59 pm blueswir1

Report unassigned memory access to CPU (not enabled yet)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2776 c046a42c-6fe2-441c-8c8c-71466251a162

e9ebed4d 04/22/2007 10:14 pm blueswir1

Sparc64 update: more VIS ops

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2714 c046a42c-6fe2-441c-8c8c-71466251a162

d2889a3e 04/13/2007 06:46 pm blueswir1

Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162