Revision 91736d37 target-sparc/cpu.h
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} while (0) |
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#endif |
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/* helper.c */ |
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CPUSPARCState *cpu_sparc_init(const char *cpu_model); |
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void gen_intermediate_code_init(CPUSPARCState *env); |
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int cpu_sparc_exec(CPUSPARCState *s); |
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void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); |
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void sparc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, |
| 344 | 344 |
...)); |
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void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); |
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/* translate.c */ |
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void gen_intermediate_code_init(CPUSPARCState *env); |
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/* cpu-exec.c */ |
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int cpu_sparc_exec(CPUSPARCState *s); |
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#define GET_PSR(env) (env->version | (env->psr & PSR_ICC) | \ |
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(env->psref? PSR_EF : 0) | \ |
| ... | ... | |
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(env->psret? PSR_ET : 0) | env->cwp) |
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#ifndef NO_CPU_IO_DEFS |
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void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); |
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static inline void memcpy32(target_ulong *dst, const target_ulong *src) |
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{
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dst[0] = src[0]; |
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dst[1] = src[1]; |
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dst[2] = src[2]; |
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dst[3] = src[3]; |
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dst[4] = src[4]; |
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dst[5] = src[5]; |
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dst[6] = src[6]; |
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dst[7] = src[7]; |
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} |
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static inline void cpu_set_cwp(CPUSPARCState *env1, int new_cwp) |
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{
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/* put the modified wrap registers at their proper location */ |
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if (env1->cwp == env1->nwindows - 1) |
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memcpy32(env1->regbase, env1->regbase + env1->nwindows * 16); |
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env1->cwp = new_cwp; |
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/* put the wrap registers at their temporary location */ |
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if (new_cwp == env1->nwindows - 1) |
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memcpy32(env1->regbase + env1->nwindows * 16, env1->regbase); |
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env1->regwptr = env1->regbase + (new_cwp * 16); |
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} |
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static inline int cpu_cwp_inc(CPUSPARCState *env1, int cwp) |
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{
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| ... | ... | |
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#endif |
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#endif |
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int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
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/* cpu-exec.c */
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void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, |
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int is_asi); |
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void cpu_check_irqs(CPUSPARCState *env); |
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| 404 | 430 |
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#define CPUState CPUSPARCState |
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#define cpu_init cpu_sparc_init |
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