Revision 925fd0f2 target-mips/op.c
b/target-mips/op.c | ||
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1340 | 1340 |
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1341 | 1341 |
/* 1k pages not implemented */ |
1342 | 1342 |
/* Ignore MIPS64 TLB for now */ |
1343 |
val = (int32_t)T0 & 0xFFFFE0FF;
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1343 |
val = (target_ulong)(int32_t)T0 & ~(target_ulong)0x1F00;
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1344 | 1344 |
old = env->CP0_EntryHi; |
1345 | 1345 |
env->CP0_EntryHi = val; |
1346 | 1346 |
/* If the ASID changes, flush qemu's TLB. */ |
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