Revision 92a16d7a hw/apic.h
b/hw/apic.h | ||
---|---|---|
1 | 1 |
#ifndef APIC_H |
2 | 2 |
#define APIC_H |
3 | 3 |
|
4 |
#include "qemu-common.h" |
|
5 |
|
|
4 | 6 |
/* apic.c */ |
5 |
typedef struct APICState APICState; |
|
6 | 7 |
void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, |
7 | 8 |
uint8_t delivery_mode, |
8 | 9 |
uint8_t vector_num, uint8_t polarity, |
9 | 10 |
uint8_t trigger_mode); |
10 |
APICState *apic_init(void *env, uint8_t apic_id); |
|
11 |
int apic_accept_pic_intr(APICState *s); |
|
12 |
void apic_deliver_pic_intr(APICState *s, int level); |
|
13 |
int apic_get_interrupt(APICState *s); |
|
11 |
int apic_accept_pic_intr(DeviceState *s); |
|
12 |
void apic_deliver_pic_intr(DeviceState *s, int level); |
|
13 |
int apic_get_interrupt(DeviceState *s); |
|
14 | 14 |
void apic_reset_irq_delivered(void); |
15 | 15 |
int apic_get_irq_delivered(void); |
16 |
void cpu_set_apic_base(APICState *s, uint64_t val);
|
|
17 |
uint64_t cpu_get_apic_base(APICState *s);
|
|
18 |
void cpu_set_apic_tpr(APICState *s, uint8_t val);
|
|
19 |
uint8_t cpu_get_apic_tpr(APICState *s);
|
|
20 |
void apic_init_reset(APICState *s);
|
|
21 |
void apic_sipi(APICState *s);
|
|
16 |
void cpu_set_apic_base(DeviceState *s, uint64_t val);
|
|
17 |
uint64_t cpu_get_apic_base(DeviceState *s);
|
|
18 |
void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
|
|
19 |
uint8_t cpu_get_apic_tpr(DeviceState *s);
|
|
20 |
void apic_init_reset(DeviceState *s);
|
|
21 |
void apic_sipi(DeviceState *s);
|
|
22 | 22 |
|
23 | 23 |
/* pc.c */ |
24 | 24 |
int cpu_is_bsp(CPUState *env); |
25 |
APICState *cpu_get_current_apic(void);
|
|
25 |
DeviceState *cpu_get_current_apic(void);
|
|
26 | 26 |
|
27 | 27 |
#endif |
Also available in: Unified diff