Revision 92f9a4f1

b/hw/apb_pci.c
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        return rc;
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    }
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    pci_config_set_vendor_id(dev->config, PCI_VENDOR_ID_SUN);
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    pci_config_set_device_id(dev->config, PCI_DEVICE_ID_SUN_SIMBA);
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    /*
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     * command register:
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     * According to PCI bridge spec, after reset
......
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    pci_set_word(dev->config + PCI_STATUS,
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                 PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ |
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                 PCI_STATUS_DEVSEL_MEDIUM);
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    pci_set_byte(dev->config + PCI_REVISION_ID, 0x11);
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    return 0;
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}
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......
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static int pbm_pci_host_init(PCIDevice *d)
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{
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    pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_SUN);
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    pci_config_set_device_id(d->config, PCI_DEVICE_ID_SUN_SABRE);
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    pci_set_word(d->config + PCI_COMMAND,
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                 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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    pci_set_word(d->config + PCI_STATUS,
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                 PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ |
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                 PCI_STATUS_DEVSEL_MEDIUM);
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    pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
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    return 0;
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}
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......
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    .qdev.name = "pbm",
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    .qdev.size = sizeof(PCIDevice),
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    .init      = pbm_pci_host_init,
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    .vendor_id = PCI_VENDOR_ID_SUN,
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    .device_id = PCI_DEVICE_ID_SUN_SABRE,
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    .class_id  = PCI_CLASS_BRIDGE_HOST,
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    .is_bridge = 1,
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};
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......
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    .qdev.reset = pci_bridge_reset,
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    .init = apb_pci_bridge_initfn,
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    .exit = pci_bridge_exitfn,
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    .vendor_id = PCI_VENDOR_ID_SUN,
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    .device_id = PCI_DEVICE_ID_SUN_SIMBA,
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    .revision = 0x11,
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    .config_write = pci_bridge_write_config,
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    .is_bridge = 1,
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};

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