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qom: Unify type registration
Replace device_init() with generalized type_init().
While at it, unify naming convention: type_init([$prefix_]register_types)Also, type_init() is a function, so add preceding blank line wherenecessary and don't put a semicolon after the closing brace....
qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion. I did it in three steps and thenrebased it into a single step which avoids repeatedly touching every file inthe tree.
The first step was a sed-based addition of the parent type to the subclass...
sysbus: apic: ioapic: convert to QEMU Object Model
This converts three devices because apic and ioapic are subclasses of sysbus.Converting subclasses independently of their base class is prohibitively hard.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ioapic: Drop post-load irr initialization
As all devices undergo a reset prior to vmloa, and the reset value ofirr is 0, we do not need to do this clearing for older vmstatesexplicitly. Dropping this redundant code will also make KVM integrationa bit simpler....
ioapic: Factor out base class for KVM reuse
Split up the IOAPIC analogously to APIC and i8259. KVM will share theIOAPICCommonState, the vmstate, reset logic and certain init parts withthe user space model.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
sysbus: rename sysbus_init_mmio_region() to sysbus_init_mmio()
Signed-off-by: Avi Kivity <avi@redhat.com>
ioapic: Reject non-dword accesses to IOWIN register
Aligns the model with the spec.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Avi Kivity <avi@redhat.com>
ioapic: Convert to memory API
This maintains the old imprecise access size handling.
target-i386: Remove unused polarity arguments from APIC API
Polarity of external interrupts needs to be handled in the IOAPIC.Passing it to the APIC is pointless. So remove all these arguments.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ioapic: Implement polarity
If the polarity bit is set in the redirection table, the input levelsimply has to inverted as it is low active in this case.
ioapic: Do not set irr for masked edge IRQs
So far we set IRR for edge IRQs even if the pin is masked. If the guestlater on unmasks and switches the pin to level-triggered mode, irr willremain set, causing an IRQ storm. The point is that setting IRR is not...
Revert "ioapic: when switches to level trigger mode, interrupts raised repeatedly."
This reverts commit 9bcfc7daabb138b0fe3d64d74892942d482e5bbd.
ioapic: when switches to level trigger mode, interrupts raised repeatedly.
- the trigger mode is edge at first- During initializatoin, the interrupt is raised as edge which is masked. The corresponding bit of irr is set.- Then the mode is switched to level and it's unmasked....
ioapic: Implement EOI handling for level-triggered IRQs
Add the missing EOI broadcast from local APIC to the IOAPICs oncompletion of level-triggered IRQs. This ensures that a still assertedIRQ source properly re-triggers an APIC IRQ.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
ioapic: Save/restore irr
This is a guest modifiable state that must be saved/restored properly.
ioapic: Add support for qemu-kvm's vmstate v2
qemu-kvm carries the IOAPIC base address in its v2 vmstate. We onlysupport the default base address so far, and saving even that in thedevice state was rejected.
Add a padding field to be able to read qemu-kvm's old state, but...
ioapic: Style & magics cleanup
Fix a few style issues and convert magic numbers into prober symbolicconstants, also fixing the wrong but unused IOAPIC_DM_SIPI value.
Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. Thetarget endianness is not of their concern, so we need to push thingsdown a level.
This patch adds a parameter to cpu_register_io_memory that allows adevice to choose its endianness. For now, all devices simply choose...
ioapic: convert to qdev
Convert to qdev.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
ioapic: unexport ioapic_set_irq
There's no need to use ioapic_set_irq() outside of ioapic.c, somake it static.
ioapic: improve debugging
Add a DPRINTF macro, use it also to see irq deliveries.
Move x86 specific PC declarations to a separate file
x86 definitions (especially CPUState uses) prevent many files frombeing compiled within libhw.
Move x86 specific declarations (APIC stuff) to a separate file.
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
vmstate: port ioapic device
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Make CPURead/WriteFunc structure 'const'
Route IOAPIC interrupts via ISA bus
Instead of calling the IOAPIC from the PIC, raise IOAPIC irqs via the ISA bus.As a side effect, IOAPIC lines 16-23 are enabled.
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Update to a hopefully more future proof FSF address
Revert "Introduce reset notifier order"
This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (andupdates later added users of qemu_register_reset), we solved theproblem it originally addressed less invasively.
Remove io_index argument from cpu_register_io_memory()
The parameter is always zero except when registering the three internalio regions (ROM, unassigned, notdirty). Remove the parameter to reducethe API's power, thus facilitating future change.
Signed-off-by: Avi Kivity <avi@redhat.com>...
Introduce reset notifier order
Add the parameter 'order' to qemu_register_reset and sort callbacks onregistration. On system reset, callbacks with lower order will beinvoked before those with higher order. Update all existing users to thestandard order 0....
From 67e94ae77f8de4d5d822917f1723cefa7ebfb64d Mon Sep 17 00:00:00 2001From: Xiantao Zhang <xiantao.zhang@intel.com>Date: Tue, 3 Mar 2009 13:33:13 +0800Subject: [PATCH] Split ioapic logic from the current apic.
Add a new ioapic.c to hold ioapic's logic, and also...