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# Date Author Comment
93148aa5 03/08/2012 05:22 pm Stefan Weil

Spelling fixes in comments (it's -> its)

  • it's -> its (fixed for all files)
  • dont -> don't (only fixed in a line which was touched by the previous fix)
  • distrub -> disturb (fixed in the same line)

Reviewed-by: Andreas Färber <>
Signed-off-by: Stefan Weil <>...

0056c093 02/28/2012 11:33 pm Stefan Weil

target-mips: Clean includes

Remove some include statements which are not needed.

Cc: Aurelien Jarno <>
Signed-off-by: Stefan Weil <>

e7d81004 12/14/2011 01:09 pm Stefan Weil

Fix spelling in comments, documentation and messages

accidently->accidentally
annother->another
choosen->chosen
consideres->considers
decriptor->descriptor
developement->development
paramter->parameter
preceed->precede
preceeding->preceding
priviledge->privilege...

4abf79a4 12/02/2011 12:50 pm Dong Xu Wang

fix spelling in target sub directory

Cc: Richard Henderson <>
Cc: Edgar E. Iglesias <>
Cc: Aurelien Jarno <>
Cc: Alexander Graf <>
Cc: Aurelien Jarno <>
Cc: Blue Swirl <>...

bccd9ec5 10/01/2011 12:31 pm Blue Swirl

softmmu_header: pass CPUState to tlb_fill

Pass CPUState pointer to tlb_fill() instead of architecture local
cpu_single_env hacks.

Signed-off-by: Blue Swirl <>

1dab005a 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Default to using one VPE and one TC.

Boards can override the setup if needed.

Signed-off-by: Edgar E. Iglesias <>

9e56e756 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Initialize MT state at reset

Only TC0 on VPE0 is active after reset. All other VPEs and
TCs start in sleep.

Signed-off-by: Edgar E. Iglesias <>

f249412c 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Add MT halting and waking of VPEs

+ some partial support for TC's.

Signed-off-by: Edgar E. Iglesias <>

344eecf6 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Support the MT TCStatus IXMT irq disable flag

Signed-off-by: Edgar E. Iglesias <>

b93bbdcd 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Handle TC indexing of other VPEs

Introduce mips_cpu_map_tc() to map a global TC index into a VPE nr
and local tc index.

Signed-off-by: Edgar E. Iglesias <>

fe8dca8c 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Synchronize CP0 TCSTatus, Status and EntryHi

These registers share some of their fields. Writes to these fields
should be visible through the corresponding mirror fields.

Signed-off-by: Edgar E. Iglesias <>

5a25ce94 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Hook in more reg accesses via mttr/mftr

Signed-off-by: Edgar E. Iglesias <>

bc45a67a 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Correct IntCtl write mask for VInt

Signed-off-by: Edgar E. Iglesias <>

e4280973 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Correct VInt vector generation

1. The pending need to pass the Status IM gating.
2. The priority is from seven (highest prio) down to zero.
QEMU was doing the opposite.

Signed-off-by: Edgar E. Iglesias <>

ded40088 09/06/2011 12:09 pm Edgar E. Iglesias

mips: Enable VInt interrupt mode for the 34Kf

Signed-off-by: Edgar E. Iglesias <>

7267c094 08/21/2011 07:01 am Anthony Liguori

Use glib memory allocation and free functions

qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <>

97b348e7 08/07/2011 12:32 pm Blue Swirl

Remove unused is_softmmu parameter from cpu_handle_mmu_fault

Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <>...

3e457172 07/30/2011 12:41 pm Blue Swirl

exec.h cleanup

Move softmmu_exec.h include directives from target-*/exec.h to
target-*/op_helper.c. Move also various other stuff only used in
op_helper.c there.

Define global env in dyngen-exec.h.

For i386, move wrappers for segment and FPU helpers from user-exec.c...

b14ef7c9 07/21/2011 12:28 am Blue Swirl

Fix unassigned memory access handling

cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory
access handling. Fix them by always passing CPUState to the handlers.

Reported-by: Hervé Poussineau <>
Signed-off-by: Blue Swirl <>

2b41f10e 06/26/2011 09:25 pm Blue Swirl

Remove exec-all.h include directives

Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <>

f081c76c 06/26/2011 09:25 pm Blue Swirl

Move cpu_has_work and cpu_pc_from_tb to cpu.h

Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is
needed by later patches.

Signed-off-by: Blue Swirl <>

f3e27037 06/26/2011 09:25 pm Blue Swirl

exec.h: fix coding style and change cpu_has_work to return bool

Before the next patch, fix coding style of the areas affected.

Change the type of the return value from cpu_has_work() and
qemu_cpu_has_work() to bool.

Signed-off-by: Blue Swirl <>

1162c041 06/26/2011 09:25 pm Blue Swirl

cpu_loop_exit: avoid using AREG0

Make cpu_loop_exit() take a parameter for CPUState instead of relying
on global env.

Signed-off-by: Blue Swirl <>

99e43d36 05/15/2011 02:00 am Aurelien Jarno

target-mips: Fix warning caused by unused local variable

Fix compilation with gcc-4.6, based on a patch from Stefan
Weil <>.

Signed-off-by: Aurelien Jarno <>

711c2128 05/12/2011 04:08 pm Anthony Liguori

Merge remote-tracking branch 'stefanha/trivial-patches' into staging

Conflicts:
cpu-all.h

ce0c6930 05/08/2011 07:55 pm Richard Henderson

target-mips: Do not check CPU_INTERRUPT_TIMER.

This bit is never set, therefore we should not read it either.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

ff2712ba 05/08/2011 12:02 pm Stefan Weil

Fix typos in comments (interupt -> interrupt)

Signed-off-by: Stefan Weil <>
Signed-off-by: Stefan Hajnoczi <>

ebabb67a 05/06/2011 10:19 am Stefan Weil

Fix typo in code and comments

Replace writeable -> writable

Signed-off-by: Stefan Weil <>
Signed-off-by: Stefan Hajnoczi <>

618ba8e6 04/20/2011 11:37 am Stefan Weil

Remove unused function parameter from cpu_restore_state

The previous patch removed the need for parameter puc.
Is is now unused, so remove it.

Cc: Aurelien Jarno <>
Reviewed-by: Peter Maydell <>
Signed-off-by: Stefan Weil <>

e87b7cb0 04/20/2011 11:33 am Stefan Weil

Remove unused function parameters from gen_pc_load and rename the function

Function gen_pc_load was introduced in commit
d2856f1ad4c259e5766847c49acbb4e390731bd4.
The only reason for parameter searched_pc was
a debug statement in target-i386/translate.c....

06a0e6b1 04/17/2011 09:32 pm Aurelien Jarno

target-mips: simplify FP comparisons

As the softfloat comparison functions already test for NaN, there is no
need to always call the float*_unordered*() functions.

Reviewed-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>

353ebb7a 04/17/2011 09:32 pm Aurelien Jarno

target-mips: don't hardcode softfloat exception bits

Reviewed-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>

30a00bc1 04/17/2011 09:32 pm Aurelien Jarno

target-mips: fix c.ps.* instructions

Contrary to cabs.ps.* instructions, c.ps.* should not compare the absolute
value of the operand, but directly the operands.

Signed-off-by: Aurelien Jarno <>

6a385343 04/17/2011 09:32 pm Aurelien Jarno

target-mips: clear softfpu exception state for comparison instructions

MIPS FPU instructions should start with a clean softfpu status. This
is done for the most instructions, but not for comparison ones.

Signed-off-by: Aurelien Jarno <>

3a599383 04/17/2011 09:32 pm Aurelien Jarno

target-mips: use new float*_unordered*() functions

Use the new float*_unordered*() functions from softfloat instead of
redefining a private version.

Reviewed-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>

211315fb 04/17/2011 09:32 pm Aurelien Jarno

softfloat: rename float*_eq() into float*_eq_quiet()

float*_eq functions have a different semantics than other comparison
functions. Fix that by first renaming float*_quiet() into float*_eq_quiet().

Note that it is purely mechanical, and the behaviour should be unchanged....

4b4a72e5 04/10/2011 01:45 am Stefan Weil

Fix conversions from pointer to tcg_target_long

tcg_gen_exit_tb takes a parameter of type tcg_target_long,
so the type casts of pointer to long should be replaced by
type casts of pointer to tcg_target_long (suggested by Blue Swirl).

These changes are needed for build environments where...

4ff9786c 04/03/2011 10:42 pm Stefan Weil

Fix trivial "endianness bugs"

Replace endianess -> endianness.

Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

eda48c34 03/13/2011 04:44 pm Paolo Bonzini

inline cpu_halted into sole caller

All implementations are now the same, and there is only one caller,
so inline the function there.

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

efd41037 02/09/2011 08:45 pm Chris Dearman

[PATCH] [MIPS] Clear softfpu exception state for round, trunc, ceil and floor

MIPS FPU instructions should start with a clean softfpu status. This
is done for the arithmetic operations and cvt instructions, but not
for round, trunc, ceil and floor.

Signed-off-by: Chris Dearman <>...

b835e919 01/24/2011 09:52 pm Aurelien Jarno

target-mips: fix save_cpu_state() calls

The rule is:
- don't save PC if the exception is only triggered by softmmu.
- save PC if the exception can be triggered by an helper.

Fix a 64-bit kernel crash when loading modules.

Signed-off-by: Aurelien Jarno <>

55807224 01/18/2011 01:32 pm Edgar E. Iglesias

mips: Break TBs after mfc0_count

Break the TB after reading the count register. This makes it
possible to take timer interrupts immediately after a read of
a possibly expired timer.

Signed-off-by: Edgar E. Iglesias <>

18569871 01/02/2011 12:15 pm Peter Maydell

softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()

The softfloat functions float*_is_nan() were badly misnamed,
because they return true only for quiet NaNs, not for all NaNs.
Rename them to float*_is_quiet_nan() to more accurately reflect...

4cdc1cd1 12/27/2010 01:58 am Aurelien Jarno

target-mips: fix host CPU consumption when guest is idle

When the CPU is in wait state, do not wake-up if an interrupt can't be
taken. This avoid host CPU running at 100% if a device (e.g. timer) has
an interrupt line left enabled.

Also factorize code to check if interrupts are enabled in...

9ed5726c 12/22/2010 12:14 pm Nathan Froyd

target-mips: fix translation of MT instructions

The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of:

int x;
... /* no initialization of x */
x = f (x);

which confused later bits of TCG rather badly, leading to crashes.

Fix the helpers to only return results (those instructions have no...

9a78eead 10/30/2010 11:01 am Stefan Weil

target-xxx: Use fprintf_function (format checking)

fprintf_function uses format checking with GCC_FMT_ATTR.

Format errors were fixed in
  • target-i386/helper.c
  • target-mips/translate.c
  • target-ppc/translate.c

Cc: Blue Swirl <>
Signed-off-by: Stefan Weil <>...

2abf314d 10/13/2010 09:43 pm Blue Swirl

mips: avoid write only variables

Compiling with GCC 4.6.0 20100925 produced a lot of warnings like:
/src/qemu/target-mips/translate.c: In function 'gen_ld':
/src/qemu/target-mips/translate.c:1039:17: error: variable 'opn' set but not used [-Werror=unused-but-set-variable]...

1c7242da 09/18/2010 08:53 am Blue Swirl

MIPS: fix yield handling

The parameter for yield should be handled as a signed integer
for the comparisons to have any effect.

This also avoids a gcc warning with -Wtype-limits.

Signed-off-by: Blue Swirl <>

138afb02 08/06/2010 01:21 pm Edgar E. Iglesias

mips: Add support for VInt and VEIC irq modes

Signed-off-by: Edgar E. Iglesias <>

671b0f36 07/31/2010 06:14 pm Hervé Poussineau

Correctly identify multiple cpus in SMP systems

Signed-off-by: Hervé Poussineau <>
Signed-off-by: Aurelien Jarno <>

cf7c00d5 07/31/2010 06:14 pm Hervé Poussineau

Remove unused constant

Remove unused constant MIPS_FCR0

Signed-off-by: Hervé Poussineau <>
Signed-off-by: Aurelien Jarno <>

5dc5d9f0 07/25/2010 05:54 pm Aurelien Jarno

mips: more fixes to the MIPS interrupt glue logic

Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of the
interrupt logic to cpu-exec.c. Remove the remaining useless code
and fix software interrupts.

Signed-off-by: Aurelien Jarno <>...

36388314 07/24/2010 02:40 pm Edgar E. Iglesias

mips: Correct MIPS interrupt glue logic for icount

When hw interrupt pending bits in CP0_Cause are set, the CPU should
see the hw interrupt line as active. The CPU may or may not take the
interrupt based on internal state (global irq mask etc) but the glue...

3fc00a7b 07/17/2010 05:13 pm Aurelien Jarno

target-mips: fix xtlb exception for loongson

Loongson 2E and 2F use the same entry for xtlb and tlb exception, at
offset 0x000.

Signed-off-by: Aurelien Jarno <>

161f85e6 07/11/2010 11:24 am Aurelien Jarno

target-mips: add loongson 2E & 2F integer instructions

This patch adds support for loongson 2E & 2F instructions. They are the
same instructions, but differ by the opcode encoding.

Signed-off-by: Aurelien Jarno <>

a88790a1 07/03/2010 09:48 am Paolo Bonzini

remove exec-all.h inclusion from cpu.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

10eb0cc0 07/03/2010 09:48 am Paolo Bonzini

move cpu_pc_from_tb to target-*/exec.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

83dae095 07/03/2010 09:47 am Paolo Bonzini

remove unused stuff from */exec.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

afa88c3a 07/02/2010 12:45 am Aurelien Jarno

target-mips: add Loongson support prefetch

Loongson CPU uses a load to zero register for prefetch.
Emulate it as a NOP.

Signed-off-by: Aurelien Jarno <>

5c13fdfd 07/01/2010 08:48 am Aurelien Jarno

target-mips: split load and store

Signed-off-by: Aurelien Jarno <>

6fbab869 06/30/2010 09:00 pm Aurelien Jarno

target-mips: fix DINSU instruction

Signed-off-by: Aurelien Jarno <>

aa8f4009 06/30/2010 12:26 am Aurelien Jarno

target-mips: enable movn/movz on loongson 2E & 2F

Signed-off-by: Aurelien Jarno <>

5bc6fba8 06/30/2010 12:07 am Huacai Chen

MIPS: Initial support of fulong mini pc (CPU definition)

Signed-off-by: Huacai Chen <>
Signed-off-by: Aurelien Jarno <>

33087598 06/10/2010 12:37 am Stefan Weil

target-mips: Fix compilation

TCGv t1 needs tcg_temp_free instead of tcg_temp_free_i32.

Cc: Nathan Froyd <>
Cc: Aurelien Jarno <>
Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

bbfa8f72 06/09/2010 05:10 pm Nathan Froyd

target-mips: add microMIPS exception handler support

Unlike MIPS16, microMIPS lets you choose the ISA mode for your exception
handlers. The ISA mode is selectable via a user-writable CP0.Config3
flag.

Signed-off-by: Nathan Froyd <>...

bf4120ad 06/09/2010 05:10 pm Nathan Froyd

target-mips: define constants for magic numbers

Add FMT_* constants for the floating-point format field in opcodes and
tweak a few places to use them. Add enums for various invocations of
FOP and tweak gen_farith and its lone caller accordingly.

Signed-off-by: Nathan Froyd <>...

e459440a 06/09/2010 05:10 pm Aurelien Jarno

target-mips: move FP FMT comments closer to the definitions

Signed-off-by: Aurelien Jarno <>

8153667c 06/09/2010 05:10 pm Nathan Froyd

target-mips: refactor c{, abs}.cond.fmt insns

Move all knowledge about coprocessor-checking and register numbering
into the gen_cmp* helper functions.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

620e48f6 06/09/2010 05:10 pm Nathan Froyd

target-mips: mips16 cleanups

Change code handling mips16-specific branches to use ISA-neutral special
opcodes. Since there are several places where the delay slot
requirements for microMIPS branches differ from mips16 branches, using
opcodes is easier than checking hflags, then checking mips16...

3c824109 06/09/2010 05:10 pm Nathan Froyd

target-mips: microMIPS ASE support

Add instruction decoding for the microMIPS ASE. All we do is decode and
then forward to the existing gen_* routines.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

26ebe468 06/08/2010 08:15 pm Nathan Froyd

target-mips: break out [ls][wd]c1 and rdhwr insn generation

Signed-off-by: Nathan Froyd <>
Acked-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

564856bb 05/05/2010 01:20 pm Richard Henderson

target-mips: Remove duplicate CPU log.

Logging for -d cpu is done in generic code.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

2a5612e6 04/09/2010 10:53 pm Stefan Weil

target-mips: Fix format specifiers for fpu_fprintf

In the previous patch which introduced fprintf_function to
allow parameter checking by gcc some compiler warnings
remained unfixed.

These warnings are fixed here.

Signed-off-by: Stefan Weil <>...

a7200c9f 04/08/2010 10:46 pm Stefan Weil

target-mips: Fix one more format specifier for cpu_fprintf

env->bcond must be printed using TARGET_FMT_ld.

Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

1a7ff922 04/08/2010 10:34 pm Paolo Bonzini

remove TARGET_* defines from translate-all.c

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>

d4c430a8 03/17/2010 04:44 am Paul Brook

Large page TLB flush

QEMU uses a fixed page size for the CPU TLB. If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.

When the guest invalidates the TLB by virtual address we must invalidate...

30724e75 03/13/2010 12:35 pm Aurelien Jarno

target-mips: update address space definitions

Signed-off-by: Aurelien Jarno <>

3c7b48b7 03/12/2010 08:44 pm Paul Brook

Target specific usermode cleanup

Disable various target specific code that is only relevant to system emulation.

Signed-off-by: Paul Brook <>

4fcc562b 03/12/2010 08:34 pm Paul Brook

Remove cpu_get_phys_page_debug from userspace emulation

cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <>

52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....

deb4203d 03/04/2010 06:42 pm Aurelien Jarno

target-mips: use newer logical ops

Signed-off-by: Aurelien Jarno <>

e68dd28f 03/03/2010 12:16 am Aurelien Jarno

target-mips: use setcond when possible

Signed-off-by: Aurelien Jarno <>

3399e30f 02/23/2010 08:47 pm Nathan Froyd

target-mips: fix ROTR and DROTR by zero

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

6462bfcd 02/23/2010 08:47 pm Aurelien Jarno

target-mips: remove useless sign extension

Signed-off-by: Aurelien Jarno <>

c2c65dab 02/23/2010 08:47 pm Nathan Froyd

target-mips: fix CpU exception for coprocessor 0

When we signal a CpU exception for coprocessor 0, we should indicate
that it's for coprocessor 0 instead of coprocessor 1.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

c36bbb28 02/06/2010 06:23 pm Aurelien Jarno

target-mips: don't call cpu_loop_exit() from helper.c

In helper.c AREG0 may not correspond do env, so it's not possible to
call cpu_loop_exit() here. Call it from op_helper.c instead.

Signed-off-by: Aurelien Jarno <>

49a945a3 01/20/2010 12:31 am Paolo Bonzini

kill regs_to_env and env_to_regs

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

ab3aee26 12/17/2009 01:28 am Stefan Weil

target-mips: No MIPS16 support for 4Kc, 4KEc cores

Fix regression introduced by d19954f46dfc262612c30e9534e660e953049487.

4Kc and 4KEc don't support MIPS16.

Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

73642f5b 12/16/2009 07:20 pm Stefan Weil

target-mips: 4Kc, 4KEc cores do not support MIPS16

4Kc, 4KEc cores do not support MIPS16, so not only the
CP0_Config1 had to be fixed (see previous patch),
but also MIPS16 instructions must not be executed.

(Hint from Nathan Froyd, thanks).

Signed-off-by: Stefan Weil <>...

91a75935 12/13/2009 10:01 pm Nathan Froyd

target-mips: fix user-mode emulation startup

Running programs with the MIPS user-mode emulator fails during dynamic
loading, as floating-point instructions are not enabled in in
env->hflags. Move the code for doing so from fpu_init to cpu_reset so
the MIPS_HFLAG_{FPU,F64} setting doesn't get clobbered by cpu_reset...

6ea219d0 12/13/2009 09:20 pm Nathan Froyd

target-mips: add enums for MIPS16 opcodes

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

364d4831 12/13/2009 09:20 pm Nathan Froyd

target-mips: add mips16 instruction decoding

There's no good way to add this incrementally, so we do it all at once.
The only changes to shared code are in handle_delay_slot. We need to
flip ISAMode when doing a jump-and-exchange. We also need to set
ISAMode the low bit of the target address for jump-to-register....

9da53be7 12/13/2009 09:20 pm Nathan Froyd

target-mips: add copyright notice for mips16 work

Also cross off mips16 ASE in TODO.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

d19954f4 12/13/2009 09:20 pm Nathan Froyd

target-mips: set Config1.CA for MIPS16-aware CPUs

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

79ef2c4c 12/13/2009 09:20 pm Nathan Froyd

target-mips: add new HFLAGs for JALX and 16/32-bit delay slots

We create separate masks for the "basic" branch hflags and the
"extended" branch hflags and define MIPS_HFLAG_BMASK as the logical or
of those two. This is done to avoid churning the codebase in lots of...

32188a03 12/13/2009 09:20 pm Nathan Froyd

target-mips: change interrupt bits to be mips16-aware

We need to stash the operating mode into the low bit of the error PC and
restore it on return from interrupts.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

ea63e2c3 12/13/2009 09:20 pm Nathan Froyd

target-mips: move ROTR and ROTRV inside gen_shift_{imm, }

It's easier to implement mips16 shift instructions if we're not
examining the opcode inside gen_shift_{imm,}. So move ROTR and ROTRV
and do the special-case handling of SRL and SRLV inside decode_opc....

7dca4ad0 12/13/2009 09:20 pm Nathan Froyd

target-mips: make gen_compute_branch 16/32-bit-aware

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

662d7485 12/13/2009 09:20 pm Nathan Froyd

target-mips: add gen_base_offset_addr

This is a common pattern in existing code. We'll also use it to
implement the mips16 SAVE/RESTORE instructions.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

c9602061 12/13/2009 09:20 pm Nathan Froyd

target-mips: split out delay slot handling

Move delay slot handling to common code whose invocation can be
controlled from gen_intermediate_code_internal.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>