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Spelling fixes in comments (it's -> its)
Reviewed-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Stefan Weil <sw@weilnetz.de>...
softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture localcpu_single_env hacks.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
mips: Add MT halting and waking of VPEs
+ some partial support for TC's.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
mips: Handle TC indexing of other VPEs
Introduce mips_cpu_map_tc() to map a global TC index into a VPE nrand local tc index.
mips: Synchronize CP0 TCSTatus, Status and EntryHi
These registers share some of their fields. Writes to these fieldsshould be visible through the corresponding mirror fields.
mips: Hook in more reg accesses via mttr/mftr
mips: Correct IntCtl write mask for VInt
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
Fix unassigned memory access handling
cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memoryaccess handling. Fix them by always passing CPUState to the handlers.
Reported-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relyingon global env.
Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.Is is now unused, so remove it.
Cc: Aurelien Jarno <aurelien@aurel32.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Weil <weil@mail.berlios.de>
target-mips: simplify FP comparisons
As the softfloat comparison functions already test for NaN, there is noneed to always call the float*_unordered*() functions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-mips: don't hardcode softfloat exception bits
target-mips: fix c.ps.* instructions
Contrary to cabs.ps.* instructions, c.ps.* should not compare the absolutevalue of the operand, but directly the operands.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-mips: clear softfpu exception state for comparison instructions
MIPS FPU instructions should start with a clean softfpu status. Thisis done for the most instructions, but not for comparison ones.
target-mips: use new float*_unordered*() functions
Use the new float*_unordered*() functions from softfloat instead ofredefining a private version.
softfloat: rename float*_eq() into float*_eq_quiet()
float*_eq functions have a different semantics than other comparisonfunctions. Fix that by first renaming float*_quiet() into float*_eq_quiet().
Note that it is purely mechanical, and the behaviour should be unchanged....
[PATCH] [MIPS] Clear softfpu exception state for round, trunc, ceil and floor
MIPS FPU instructions should start with a clean softfpu status. Thisis done for the arithmetic operations and cvt instructions, but notfor round, trunc, ceil and floor.
Signed-off-by: Chris Dearman <chris@mips.com>...
softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()
The softfloat functions float*_is_nan() were badly misnamed,because they return true only for quiet NaNs, not for all NaNs.Rename them to float*_is_quiet_nan() to more accurately reflect...
target-mips: fix translation of MT instructions
The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of:
int x; ... /* no initialization of x */ x = f (x);
which confused later bits of TCG rather badly, leading to crashes.
Fix the helpers to only return results (those instructions have no...
MIPS: fix yield handling
The parameter for yield should be handled as a signed integerfor the comparisons to have any effect.
This also avoids a gcc warning with -Wtype-limits.
Correctly identify multiple cpus in SMP systems
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
mips: more fixes to the MIPS interrupt glue logic
Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of theinterrupt logic to cpu-exec.c. Remove the remaining useless codeand fix software interrupts.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
mips: Correct MIPS interrupt glue logic for icount
When hw interrupt pending bits in CP0_Cause are set, the CPU shouldsee the hw interrupt line as active. The CPU may or may not take theinterrupt based on internal state (global irq mask etc) but the glue...
remove unused stuff from */exec.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-mips: microMIPS ASE support
Add instruction decoding for the microMIPS ASE. All we do is decode andthen forward to the existing gen_* routines.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-mips: don't call cpu_loop_exit() from helper.c
In helper.c AREG0 may not correspond do env, so it's not possible tocall cpu_loop_exit() here. Call it from op_helper.c instead.
target-mips: change interrupt bits to be mips16-aware
We need to stash the operating mode into the low bit of the error PC andrestore it on return from interrupts.
target-mips: use physical address in lladdr
Currently the ll/sc instructions use the virtual address in bothuser and system mode. Use the physical address insteead in systemmode.
target-mips: factorize load/store code in op_helper.c
target-mips: make CP0_LLAddr register CPU dependent
Depending on the CPU, CP0_LLAddr is either read-only or read-write,and the returned value can be shifted by a variable amount of bits.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
target-mips: rename CP0_LLAddr into lladdr
The variable CP0_LLAddr represent the full lladdr, not the actualregister value, which is only part of this value and depends on theCPU.
target-mips: fix indentation
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
Add 'static' to please Sparse
Update to a hopefully more future proof FSF address
target-mips: variable names consistency
Use a consistent naming of arguments and TCG variables across the wholefile, the same as in tcg/tcg-op.h:- arg1, arg2, ... for arguments- t0, t1, t2, ... for variables
target-mips: implement FPU Flush-To-Zero mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6914 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: remove dead code
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6774 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: rename helpers from do_ to helper_
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevelglobal variables to use the new qemu_log*() macros.
Remove all tabs from target-mips/*
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6306 c046a42c-6fe2-441c-8c8c-71466251a162
Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplatein most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
Fix remaining compiler warnings for mips targets.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162
MIPS: remove a few warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5944 c046a42c-6fe2-441c-8c8c-71466251a162
TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: convert bit shuffle ops to TCG
Bit shuffle operations can be written with very few TCG instructions(between 5 and 8), so it is worth converting them to TCG.
This code also move all bit shuffle generation code to a separatefunction in order to have a cleaner exception code path, that is it...
target-mips: convert bitfield ops to TCG
Bitfield operations can be written with very few TCG instructions(between 2 and 5), so it is worth converting them to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix mft* helpers/call
This patch attempts to fix mft* helpers and the associated TCG calls.mft* helpers do not take a register in argument, however:- some helpers are called with an argument while they do not take one.- some helpers are declared with an argument they don't use....
Show size for unassigned accesses (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
Move the active FPU registers into env again, and use more TCG registersto access them.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
MIPS: Fix tlbwi/tlbwr
In CP0 Index register, bit 31 means 'Probe Failure', while lowest bitscontain the TLB index.
In tlbwi and tlbwr instructions, this Probe Failure bit must be ignoredwhen reading the TLB index.
Attached patch fixes it.
(Hervé Poussineau)...
Use plain standard inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4929 c046a42c-6fe2-441c-8c8c-71466251a162
Less hardcoding of TARGET_USER_ONLY.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
Use temporary registers for the MIPS FPU emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
Remove unnecessary helper arguments, and fix some typos.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4802 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid unused input arguments which triggered tcg errors. Spotted byStefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162
More efficient target register / TC accesses.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
Remove remaining uses of T0 in the MIPS target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162
Use temporaries instead of fixed registers for some instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4784 c046a42c-6fe2-441c-8c8c-71466251a162
Pass T0/T1 explicitly to helper functions, and clean up a few dyngenleftovers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4780 c046a42c-6fe2-441c-8c8c-71466251a162
Convert unaligned load/store to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4759 c046a42c-6fe2-441c-8c8c-71466251a162
Convert vr54xx multiply instructions to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4756 c046a42c-6fe2-441c-8c8c-71466251a162
Convert remaining MIPS FP instructions to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4753 c046a42c-6fe2-441c-8c8c-71466251a162
Switch the standard multiplication instructions to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4740 c046a42c-6fe2-441c-8c8c-71466251a162
Switch bitfield instructions and assorted special ops to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4739 c046a42c-6fe2-441c-8c8c-71466251a162
TCGify a few more instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4736 c046a42c-6fe2-441c-8c8c-71466251a162
Switch remaining CP0 instructions to TCG or helper functions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4708 c046a42c-6fe2-441c-8c8c-71466251a162
Fix off-by-one unwinding error.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
Fix build failure for MIPS64 targets on 64-bit hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4536 c046a42c-6fe2-441c-8c8c-71466251a162
Switch MIPS clo/clz and the condition tests to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4507 c046a42c-6fe2-441c-8c8c-71466251a162
Switch most MIPS logical and arithmetic instructions to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
fixed do_restore_state()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4413 c046a42c-6fe2-441c-8c8c-71466251a162
Make MIPS MT implementation more cache friendly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
Fix broken absoluteness check for cabs.d.*.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3900 c046a42c-6fe2-441c-8c8c-71466251a162
Support for VR5432, and some of its special instructions. Original patchby Dirk Behme.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid host FPE for overflowing division on MIPS, by Richard Sandiford.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3856 c046a42c-6fe2-441c-8c8c-71466251a162
Add strict checking mode for softfp code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
Fix MIPS64 R2 instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3686 c046a42c-6fe2-441c-8c8c-71466251a162
Fix int/float inconsistencies.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3672 c046a42c-6fe2-441c-8c8c-71466251a162
Clean out the N32 macros from target-mips, and introduce MIPS ABI specificdefines for linux-user.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
Adjust s390 addresses (the MSB is defined as "to be ignored").
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
Implement missing MIPS supervisor mode bits.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
Add sharable clz/clo inline functions and use them for the mips target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3455 c046a42c-6fe2-441c-8c8c-71466251a162
Handle IBE on MIPS properly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
Replace is_user variable with mmu_idx in softmmu core, allowing support of more than 2 mmu access modes.Add backward compatibility is_user variable in targets code when needed.Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions....
Use always_inline in the MIPS support where applicable.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3375 c046a42c-6fe2-441c-8c8c-71466251a162
Fix [ls][wd][lr] instructions, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for n32/n64 mips userland emulation. Not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
Less magic constants.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3266 c046a42c-6fe2-441c-8c8c-71466251a162
Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3255 c046a42c-6fe2-441c-8c8c-71466251a162
Timer start/stop implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Partial support for 34K multithreading, not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
Simplify round/ceil/floor implementation, spotted by Fabrice Bellard.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
Fix computation for ceil, floor and round instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162