Statistics
| Branch: | Revision:

root / tcg @ 932234f6

Name Size
  arm
  hppa
  i386
  mips
  ppc
  ppc64
  s390
  sparc
  x86_64
LICENSE 146 Bytes
README 13.8 kB
TODO 403 Bytes
tcg-op.h 66.8 kB
tcg-opc.h 8.5 kB
tcg-runtime.h 473 Bytes
tcg.c 62.6 kB
tcg.h 14.3 kB

Latest revisions

# Date Author Comment
932234f6 03/13/2010 12:46 pm Aurelien Jarno

tcg/arm: implement andc op

Signed-off-by: Aurelien Jarno <>

a3f5054b 03/13/2010 12:44 pm Aurelien Jarno

tcg: update README with const and pure helpers

Signed-off-by: Aurelien Jarno <>

4e17eae9 03/13/2010 12:44 pm Aurelien Jarno

tcg/arm: correctly save/restore registers in prologue/epilogue

Since commit 6113d6d3169393c323ac4c82d756a850145a5e7a QEMU crashes
on ARM hosts. This is not a bug of this commit, but a latent bug
revealed by this commit.

The TCG code is called through a procedure call using the prologue...

65850a02 03/13/2010 11:52 am Blue Swirl

Fix Sparc host build breakage

Fix error:
CC sparc-bsd-user/op_helper.o
In file included from /src/qemu/tcg/tcg.c:158:
/src/qemu/tcg/sparc/tcg-target.c:728:5: "TARGET_PHYS_ADDR_BITS" is not defined

Signed-off-by: Blue Swirl <>

35f6b599 03/12/2010 11:27 pm malc

tcg/ppc64: Only define addend load helpers in softmmu case

Signed-off-by: malc <>

20cb400d 03/12/2010 08:34 pm Paul Brook

Remove TLB from userspace

Remove TLB from userspace CPU structure.

Signed-off-by: Paul Brook <>

d3f137e3 03/03/2010 12:12 am Aurelien Jarno

tcg/arm: merge the two sets of #define for optional ops

Signed-off-by: Aurelien Jarno <>

023e77f8 03/02/2010 11:31 pm Aurelien Jarno

tcg/arm: accept immediate arguments for brcond/setcond

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

b525f0a9 03/02/2010 11:26 pm Andrzej Zaborowski

Add a missing break

e0404769 03/02/2010 11:19 pm Aurelien Jarno

tcg/arm: implement setcond2

Signed-off-by: Aurelien Jarno <>
Signed-off-by: Andrzej Zaborowski <>

View revisions

Also available in: Atom