Revision 94ad5b00

b/hw/ppc.c
208 208
            } else {
209 209
                LOG_IRQ("%s: restart the CPU\n", __func__);
210 210
                env->halted = 0;
211
                qemu_cpu_kick(env);
211 212
            }
212 213
            break;
213 214
        case PPC970_INPUT_HRESET:
......
300 301
            } else {
301 302
                LOG_IRQ("%s: restart the CPU\n", __func__);
302 303
                env->halted = 0;
304
                qemu_cpu_kick(env);
303 305
            }
304 306
            break;
305 307
        case PPC40x_INPUT_DEBUG:
b/hw/sun4m.c
253 253
    }
254 254
}
255 255

  
256
static void cpu_kick_irq(CPUState *env)
257
{
258
    env->halted = 0;
259
    cpu_check_irqs(env);
260
    qemu_cpu_kick(env);
261
}
262

  
256 263
static void cpu_set_irq(void *opaque, int irq, int level)
257 264
{
258 265
    CPUState *env = opaque;
259 266

  
260 267
    if (level) {
261 268
        trace_sun4m_cpu_set_irq_raise(irq);
262
        env->halted = 0;
263 269
        env->pil_in |= 1 << irq;
264
        cpu_check_irqs(env);
270
        cpu_kick_irq(env);
265 271
    } else {
266 272
        trace_sun4m_cpu_set_irq_lower(irq);
267 273
        env->pil_in &= ~(1 << irq);
b/hw/sun4u.c
298 298
{
299 299
    env->halted = 0;
300 300
    cpu_check_irqs(env);
301
    qemu_cpu_kick(env);
301 302
}
302 303

  
303 304
static void cpu_set_irq(void *opaque, int irq, int level)
......
306 307

  
307 308
    if (level) {
308 309
        CPUIRQ_DPRINTF("Raise CPU IRQ %d\n", irq);
309
        env->halted = 0;
310 310
        env->pil_in |= 1 << irq;
311
        cpu_check_irqs(env);
311
        cpu_kick_irq(env);
312 312
    } else {
313 313
        CPUIRQ_DPRINTF("Lower CPU IRQ %d\n", irq);
314 314
        env->pil_in &= ~(1 << irq);
b/target-s390x/kvm.c
194 194

  
195 195
    env->halted = 0;
196 196
    env->exception_index = -1;
197
    qemu_cpu_kick(env);
197 198

  
198 199
    kvmint.type = type;
199 200
    kvmint.parm = parm;

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