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	break;

    }

    return CIRRUS_HOOK_HANDLED;

}

#endif

    }

    s->cirrus_hidden_dac_lockindex = 0;

}

/***************************************

	break;

    }

    return CIRRUS_HOOK_HANDLED;

}

	if (s->ar_flip_flop == 0) {

	    val &= 0x3f;

	    s->ar_index = val;

	} else {

	    index = s->ar_index & 0x1f;

	    switch (index) {

	    /* can always write bit 4 of CR7 */

	    if (s->cr_index == 7)

		s->cr[7] = (s->cr[7] & ~0x10) | (val & 0x10);

	    return;

	}

	switch (s->cr_index) {

	    s->update_retrace_info((VGAState *) s);

	    break;

	}

	break;

    case 0x3ba:

    case 0x3da:

    cirrus_update_memory_access(s);

    /* force refresh */

    cirrus_update_bank_ptr(s, 0);

    cirrus_update_bank_ptr(s, 1);

    return 0;