Revision 968a40f6 target-microblaze/op_helper.c

b/target-microblaze/op_helper.c
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    return 0;
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}
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void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t size)
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{
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    uint32_t mask;
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    switch (size) {
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        case 4: mask = 3; break;
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        case 2: mask = 1; break;
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        default:
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        case 1: mask = 0; break;
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    }
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    if (addr & mask) {
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            qemu_log("unaligned access addr=%x size=%d, wr=%d\n",
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                     addr, size, wr);
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            if (!(env->sregs[SR_MSR] & MSR_EE)) {
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                return;
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            }
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            env->sregs[SR_ESR] = ESR_EC_UNALIGNED_DATA | (wr << 10) \
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                                 | (dr & 31) << 5;
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            if (size == 4) {
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                env->sregs[SR_ESR] |= 1 << 11;
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            }
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            helper_raise_exception(EXCP_HW_EXCP);
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    }
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}
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#if !defined(CONFIG_USER_ONLY)
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/* Writes/reads to the MMU's special regs end up here.  */
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uint32_t helper_mmu_read(uint32_t rn)

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