Revision 96912e39 target-ppc/op_helper.c
| b/target-ppc/op_helper.c | ||
|---|---|---|
| 975 | 975 |
farg1.ll = arg1; |
| 976 | 976 |
farg2.ll = arg2; |
| 977 | 977 |
|
| 978 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 979 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 980 |
/* sNaN addition */ |
|
| 981 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 982 |
} else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
|
| 983 |
float64_is_neg(farg1.d) != float64_is_neg(farg2.d))) {
|
|
| 978 |
if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
|
| 979 |
float64_is_neg(farg1.d) != float64_is_neg(farg2.d))) {
|
|
| 984 | 980 |
/* Magnitude subtraction of infinities */ |
| 985 | 981 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 986 | 982 |
} else {
|
| 983 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 984 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 985 |
/* sNaN addition */ |
|
| 986 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 987 |
} |
|
| 987 | 988 |
farg1.d = float64_add(farg1.d, farg2.d, &env->fp_status); |
| 988 | 989 |
} |
| 989 | 990 |
|
| ... | ... | |
| 998 | 999 |
farg1.ll = arg1; |
| 999 | 1000 |
farg2.ll = arg2; |
| 1000 | 1001 |
|
| 1001 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1002 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 1003 |
/* sNaN subtraction */ |
|
| 1004 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1005 |
} else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
|
| 1006 |
float64_is_neg(farg1.d) == float64_is_neg(farg2.d))) {
|
|
| 1002 |
if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d) && |
|
| 1003 |
float64_is_neg(farg1.d) == float64_is_neg(farg2.d))) {
|
|
| 1007 | 1004 |
/* Magnitude subtraction of infinities */ |
| 1008 | 1005 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); |
| 1009 | 1006 |
} else {
|
| 1007 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1008 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 1009 |
/* sNaN subtraction */ |
|
| 1010 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1011 |
} |
|
| 1010 | 1012 |
farg1.d = float64_sub(farg1.d, farg2.d, &env->fp_status); |
| 1011 | 1013 |
} |
| 1012 | 1014 |
|
| ... | ... | |
| 1021 | 1023 |
farg1.ll = arg1; |
| 1022 | 1024 |
farg2.ll = arg2; |
| 1023 | 1025 |
|
| 1024 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1025 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 1026 |
/* sNaN multiplication */ |
|
| 1027 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1028 |
} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1029 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
|
| 1026 |
if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1027 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
|
| 1030 | 1028 |
/* Multiplication of zero by infinity */ |
| 1031 | 1029 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
| 1032 | 1030 |
} else {
|
| 1031 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1032 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 1033 |
/* sNaN multiplication */ |
|
| 1034 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1035 |
} |
|
| 1033 | 1036 |
farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); |
| 1034 | 1037 |
} |
| 1035 | 1038 |
|
| ... | ... | |
| 1044 | 1047 |
farg1.ll = arg1; |
| 1045 | 1048 |
farg2.ll = arg2; |
| 1046 | 1049 |
|
| 1047 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1048 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 1049 |
/* sNaN division */ |
|
| 1050 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1051 |
} else if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d))) {
|
|
| 1050 |
if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d))) {
|
|
| 1052 | 1051 |
/* Division of infinity by infinity */ |
| 1053 | 1052 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIDI); |
| 1054 | 1053 |
} else if (unlikely(float64_is_zero(farg1.d) && float64_is_zero(farg2.d))) {
|
| 1055 | 1054 |
/* Division of zero by zero */ |
| 1056 | 1055 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXZDZ); |
| 1057 | 1056 |
} else {
|
| 1057 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1058 |
float64_is_signaling_nan(farg2.d))) {
|
|
| 1059 |
/* sNaN division */ |
|
| 1060 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1061 |
} |
|
| 1058 | 1062 |
farg1.d = float64_div(farg1.d, farg2.d, &env->fp_status); |
| 1059 | 1063 |
} |
| 1060 | 1064 |
|
| ... | ... | |
| 1232 | 1236 |
farg2.ll = arg2; |
| 1233 | 1237 |
farg3.ll = arg3; |
| 1234 | 1238 |
|
| 1235 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1236 |
float64_is_signaling_nan(farg2.d) || |
|
| 1237 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1238 |
/* sNaN operation */ |
|
| 1239 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1240 |
} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1241 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
|
| 1239 |
if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1240 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
|
| 1242 | 1241 |
/* Multiplication of zero by infinity */ |
| 1243 | 1242 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
| 1244 | 1243 |
} else {
|
| 1244 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1245 |
float64_is_signaling_nan(farg2.d) || |
|
| 1246 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1247 |
/* sNaN operation */ |
|
| 1248 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1249 |
} |
|
| 1245 | 1250 |
#ifdef FLOAT128 |
| 1246 | 1251 |
/* This is the way the PowerPC specification defines it */ |
| 1247 | 1252 |
float128 ft0_128, ft1_128; |
| ... | ... | |
| 1276 | 1281 |
farg2.ll = arg2; |
| 1277 | 1282 |
farg3.ll = arg3; |
| 1278 | 1283 |
|
| 1279 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1280 |
float64_is_signaling_nan(farg2.d) || |
|
| 1281 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1282 |
/* sNaN operation */ |
|
| 1283 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1284 |
} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1284 |
if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1285 | 1285 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
| 1286 | 1286 |
/* Multiplication of zero by infinity */ |
| 1287 | 1287 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
| 1288 | 1288 |
} else {
|
| 1289 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1290 |
float64_is_signaling_nan(farg2.d) || |
|
| 1291 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1292 |
/* sNaN operation */ |
|
| 1293 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1294 |
} |
|
| 1289 | 1295 |
#ifdef FLOAT128 |
| 1290 | 1296 |
/* This is the way the PowerPC specification defines it */ |
| 1291 | 1297 |
float128 ft0_128, ft1_128; |
| ... | ... | |
| 1319 | 1325 |
farg2.ll = arg2; |
| 1320 | 1326 |
farg3.ll = arg3; |
| 1321 | 1327 |
|
| 1322 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1323 |
float64_is_signaling_nan(farg2.d) || |
|
| 1324 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1325 |
/* sNaN operation */ |
|
| 1326 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1327 |
} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1328 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
|
| 1328 |
if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1329 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
|
| 1329 | 1330 |
/* Multiplication of zero by infinity */ |
| 1330 | 1331 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
| 1331 | 1332 |
} else {
|
| 1333 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1334 |
float64_is_signaling_nan(farg2.d) || |
|
| 1335 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1336 |
/* sNaN operation */ |
|
| 1337 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1338 |
} |
|
| 1332 | 1339 |
#ifdef FLOAT128 |
| 1333 | 1340 |
/* This is the way the PowerPC specification defines it */ |
| 1334 | 1341 |
float128 ft0_128, ft1_128; |
| ... | ... | |
| 1364 | 1371 |
farg2.ll = arg2; |
| 1365 | 1372 |
farg3.ll = arg3; |
| 1366 | 1373 |
|
| 1367 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1368 |
float64_is_signaling_nan(farg2.d) || |
|
| 1369 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1370 |
/* sNaN operation */ |
|
| 1371 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1372 |
} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1374 |
if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || |
|
| 1373 | 1375 |
(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
|
| 1374 | 1376 |
/* Multiplication of zero by infinity */ |
| 1375 | 1377 |
farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); |
| 1376 | 1378 |
} else {
|
| 1379 |
if (unlikely(float64_is_signaling_nan(farg1.d) || |
|
| 1380 |
float64_is_signaling_nan(farg2.d) || |
|
| 1381 |
float64_is_signaling_nan(farg3.d))) {
|
|
| 1382 |
/* sNaN operation */ |
|
| 1383 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1384 |
} |
|
| 1377 | 1385 |
#ifdef FLOAT128 |
| 1378 | 1386 |
/* This is the way the PowerPC specification defines it */ |
| 1379 | 1387 |
float128 ft0_128, ft1_128; |
| ... | ... | |
| 1409 | 1417 |
|
| 1410 | 1418 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
| 1411 | 1419 |
/* sNaN square root */ |
| 1412 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1413 |
} else {
|
|
| 1414 |
f32 = float64_to_float32(farg.d, &env->fp_status); |
|
| 1415 |
farg.d = float32_to_float64(f32, &env->fp_status); |
|
| 1420 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1416 | 1421 |
} |
| 1422 |
f32 = float64_to_float32(farg.d, &env->fp_status); |
|
| 1423 |
farg.d = float32_to_float64(f32, &env->fp_status); |
|
| 1424 |
|
|
| 1417 | 1425 |
return farg.ll; |
| 1418 | 1426 |
} |
| 1419 | 1427 |
|
| ... | ... | |
| 1423 | 1431 |
CPU_DoubleU farg; |
| 1424 | 1432 |
farg.ll = arg; |
| 1425 | 1433 |
|
| 1426 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
|
| 1427 |
/* sNaN square root */ |
|
| 1428 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1429 |
} else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) {
|
|
| 1434 |
if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) {
|
|
| 1430 | 1435 |
/* Square root of a negative nonzero number */ |
| 1431 | 1436 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSQRT); |
| 1432 | 1437 |
} else {
|
| 1438 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
|
| 1439 |
/* sNaN square root */ |
|
| 1440 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1441 |
} |
|
| 1433 | 1442 |
farg.d = float64_sqrt(farg.d, &env->fp_status); |
| 1434 | 1443 |
} |
| 1435 | 1444 |
return farg.ll; |
| ... | ... | |
| 1443 | 1452 |
|
| 1444 | 1453 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
| 1445 | 1454 |
/* sNaN reciprocal */ |
| 1446 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1447 |
} else {
|
|
| 1448 |
farg.d = float64_div(float64_one, farg.d, &env->fp_status); |
|
| 1455 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1449 | 1456 |
} |
| 1457 |
farg.d = float64_div(float64_one, farg.d, &env->fp_status); |
|
| 1450 | 1458 |
return farg.d; |
| 1451 | 1459 |
} |
| 1452 | 1460 |
|
| ... | ... | |
| 1459 | 1467 |
|
| 1460 | 1468 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
| 1461 | 1469 |
/* sNaN reciprocal */ |
| 1462 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1463 |
} else {
|
|
| 1464 |
farg.d = float64_div(float64_one, farg.d, &env->fp_status); |
|
| 1465 |
f32 = float64_to_float32(farg.d, &env->fp_status); |
|
| 1466 |
farg.d = float32_to_float64(f32, &env->fp_status); |
|
| 1470 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1467 | 1471 |
} |
| 1472 |
farg.d = float64_div(float64_one, farg.d, &env->fp_status); |
|
| 1473 |
f32 = float64_to_float32(farg.d, &env->fp_status); |
|
| 1474 |
farg.d = float32_to_float64(f32, &env->fp_status); |
|
| 1475 |
|
|
| 1468 | 1476 |
return farg.ll; |
| 1469 | 1477 |
} |
| 1470 | 1478 |
|
| ... | ... | |
| 1475 | 1483 |
float32 f32; |
| 1476 | 1484 |
farg.ll = arg; |
| 1477 | 1485 |
|
| 1478 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
|
| 1479 |
/* sNaN reciprocal square root */ |
|
| 1480 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1481 |
} else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) {
|
|
| 1486 |
if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) {
|
|
| 1482 | 1487 |
/* Reciprocal square root of a negative nonzero number */ |
| 1483 | 1488 |
farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSQRT); |
| 1484 | 1489 |
} else {
|
| 1490 |
if (unlikely(float64_is_signaling_nan(farg.d))) {
|
|
| 1491 |
/* sNaN reciprocal square root */ |
|
| 1492 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
|
| 1493 |
} |
|
| 1485 | 1494 |
farg.d = float64_sqrt(farg.d, &env->fp_status); |
| 1486 | 1495 |
farg.d = float64_div(float64_one, farg.d, &env->fp_status); |
| 1487 | 1496 |
f32 = float64_to_float32(farg.d, &env->fp_status); |
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