Revision 96e2fc41 hw/sh7750.c
| b/hw/sh7750.c | ||
|---|---|---|
| 678 | 678 |
tmu012_init(0x1fd80000, |
| 679 | 679 |
TMU012_FEAT_TOCR | TMU012_FEAT_3CHAN | TMU012_FEAT_EXTCLK, |
| 680 | 680 |
s->periph_freq, |
| 681 |
sh_intc_source(&s->intc, TMU0),
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| 682 |
sh_intc_source(&s->intc, TMU1),
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|
| 683 |
sh_intc_source(&s->intc, TMU2_TUNI),
|
|
| 684 |
sh_intc_source(&s->intc, TMU2_TICPI));
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|
| 681 |
s->intc.irqs[TMU0],
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| 682 |
s->intc.irqs[TMU1],
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| 683 |
s->intc.irqs[TMU2_TUNI],
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| 684 |
s->intc.irqs[TMU2_TICPI]);
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|
| 685 | 685 |
|
| 686 | 686 |
if (cpu->id & (SH_CPU_SH7750 | SH_CPU_SH7750S | SH_CPU_SH7751)) {
|
| 687 | 687 |
sh_intc_register_sources(&s->intc, |
| ... | ... | |
| 700 | 700 |
_INTC_ARRAY(vectors_tmu34), |
| 701 | 701 |
NULL, 0); |
| 702 | 702 |
tmu012_init(0x1e100000, 0, s->periph_freq, |
| 703 |
sh_intc_source(&s->intc, TMU3),
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| 704 |
sh_intc_source(&s->intc, TMU4),
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| 703 |
s->intc.irqs[TMU3],
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| 704 |
s->intc.irqs[TMU4],
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| 705 | 705 |
NULL, NULL); |
| 706 | 706 |
} |
| 707 | 707 |
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