Revision 97bf4851 trace-events
b/trace-events | ||
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81 | 81 |
disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" |
82 | 82 |
disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" |
83 | 83 |
disable apic_set_irq(int apic_irq_delivered) "coalescing %d" |
84 |
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85 |
# hw/cs4231.c |
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86 |
disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" |
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87 |
disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" |
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88 |
disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" |
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89 |
disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" |
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90 |
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91 |
# hw/eccmemctl.c |
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92 |
disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" |
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93 |
disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" |
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94 |
disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" |
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95 |
disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" |
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96 |
disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" |
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97 |
disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" |
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98 |
disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" |
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99 |
disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" |
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100 |
disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" |
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101 |
disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" |
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102 |
disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" |
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103 |
disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" |
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104 |
disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" |
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105 |
disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" |
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106 |
disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" |
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107 |
disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" |
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108 |
disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" |
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109 |
disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" |
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110 |
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111 |
# hw/lance.c |
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112 |
disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" |
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113 |
disable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" |
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114 |
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115 |
# hw/slavio_intctl.c |
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116 |
disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" |
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117 |
disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" |
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118 |
disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" |
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119 |
disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" |
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120 |
disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" |
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121 |
disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" |
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122 |
disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" |
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123 |
disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" |
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124 |
disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" |
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125 |
disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" |
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126 |
disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" |
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127 |
disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" |
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128 |
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129 |
# hw/slavio_misc.c |
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130 |
disable slavio_misc_update_irq_raise(void) "Raise IRQ" |
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131 |
disable slavio_misc_update_irq_lower(void) "Lower IRQ" |
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132 |
disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" |
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133 |
disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" |
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134 |
disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" |
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135 |
disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" |
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136 |
disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" |
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137 |
disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" |
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138 |
disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" |
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139 |
disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" |
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140 |
disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" |
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141 |
disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" |
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142 |
disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" |
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143 |
disable apc_mem_writeb(uint32_t val) "Write power management %02x" |
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144 |
disable apc_mem_readb(uint32_t ret) "Read power management %02x" |
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145 |
disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" |
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146 |
disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" |
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147 |
disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" |
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148 |
disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" |
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149 |
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150 |
# hw/slavio_timer.c |
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151 |
disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" |
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152 |
disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" |
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153 |
disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" |
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154 |
disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" |
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155 |
disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" |
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156 |
disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" |
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157 |
disable slavio_timer_mem_writel_counter_invalid(void) "not user timer" |
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158 |
disable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" |
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159 |
disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" |
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160 |
disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" |
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161 |
disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" |
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162 |
disable slavio_timer_mem_writel_mode_invalid(void) "not system timer" |
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163 |
disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" |
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164 |
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165 |
# hw/sparc32_dma.c |
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166 |
disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" |
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167 |
disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" |
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168 |
disable sparc32_dma_set_irq_raise(void) "Raise IRQ" |
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169 |
disable sparc32_dma_set_irq_lower(void) "Lower IRQ" |
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170 |
disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" |
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171 |
disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" |
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172 |
disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" |
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173 |
disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" |
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174 |
disable sparc32_dma_enable_raise(void) "Raise DMA enable" |
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175 |
disable sparc32_dma_enable_lower(void) "Lower DMA enable" |
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176 |
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177 |
# hw/sun4m.c |
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178 |
disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" |
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179 |
disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" |
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180 |
disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" |
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181 |
disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" |
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182 |
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183 |
# hw/sun4m_iommu.c |
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184 |
disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" |
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185 |
disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" |
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186 |
disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" |
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187 |
disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" |
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188 |
disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" |
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189 |
disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" |
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190 |
disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" |
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191 |
disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" |
Also available in: Unified diff