Revision 99a0949b hw/dp8393x.c
b/hw/dp8393x.c | ||
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166 | 166 |
int loopback_packet; |
167 | 167 |
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168 | 168 |
/* Memory access */ |
169 |
void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
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void (*memory_rw)(void *opaque, a_target_phys_addr addr, uint8_t *buf, int len, int is_write);
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170 | 170 |
void* mem_opaque; |
171 | 171 |
} dp8393xState; |
172 | 172 |
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... | ... | |
601 | 601 |
dp8393x_update_irq(s); |
602 | 602 |
} |
603 | 603 |
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static uint32_t dp8393x_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t dp8393x_readw(void *opaque, a_target_phys_addr addr)
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605 | 605 |
{ |
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dp8393xState *s = opaque; |
607 | 607 |
int reg; |
... | ... | |
614 | 614 |
return read_register(s, reg); |
615 | 615 |
} |
616 | 616 |
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617 |
static uint32_t dp8393x_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t dp8393x_readb(void *opaque, a_target_phys_addr addr)
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618 | 618 |
{ |
619 | 619 |
uint16_t v = dp8393x_readw(opaque, addr & ~0x1); |
620 | 620 |
return (v >> (8 * (addr & 0x1))) & 0xff; |
621 | 621 |
} |
622 | 622 |
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623 |
static uint32_t dp8393x_readl(void *opaque, target_phys_addr_t addr)
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623 |
static uint32_t dp8393x_readl(void *opaque, a_target_phys_addr addr)
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624 | 624 |
{ |
625 | 625 |
uint32_t v; |
626 | 626 |
v = dp8393x_readw(opaque, addr); |
... | ... | |
628 | 628 |
return v; |
629 | 629 |
} |
630 | 630 |
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631 |
static void dp8393x_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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631 |
static void dp8393x_writew(void *opaque, a_target_phys_addr addr, uint32_t val)
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632 | 632 |
{ |
633 | 633 |
dp8393xState *s = opaque; |
634 | 634 |
int reg; |
... | ... | |
642 | 642 |
write_register(s, reg, (uint16_t)val); |
643 | 643 |
} |
644 | 644 |
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645 |
static void dp8393x_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void dp8393x_writeb(void *opaque, a_target_phys_addr addr, uint32_t val)
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646 | 646 |
{ |
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uint16_t old_val = dp8393x_readw(opaque, addr & ~0x1); |
648 | 648 |
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... | ... | |
657 | 657 |
dp8393x_writew(opaque, addr & ~0x1, val); |
658 | 658 |
} |
659 | 659 |
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static void dp8393x_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void dp8393x_writel(void *opaque, a_target_phys_addr addr, uint32_t val)
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661 | 661 |
{ |
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dp8393x_writew(opaque, addr, val & 0xffff); |
663 | 663 |
dp8393x_writew(opaque, addr + 2, (val >> 16) & 0xffff); |
... | ... | |
872 | 872 |
qemu_free(s); |
873 | 873 |
} |
874 | 874 |
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void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
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void dp83932_init(NICInfo *nd, a_target_phys_addr base, int it_shift,
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876 | 876 |
qemu_irq irq, void* mem_opaque, |
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void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write))
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void (*memory_rw)(void *opaque, a_target_phys_addr addr, uint8_t *buf, int len, int is_write))
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878 | 878 |
{ |
879 | 879 |
dp8393xState *s; |
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