Revision 99a0949b hw/hpet.c
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} |
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#ifdef HPET_DEBUG |
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static uint32_t hpet_ram_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t hpet_ram_readb(void *opaque, a_target_phys_addr addr)
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{
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printf("qemu: hpet_read b at %" PRIx64 "\n", addr);
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return 0; |
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} |
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static uint32_t hpet_ram_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t hpet_ram_readw(void *opaque, a_target_phys_addr addr)
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{
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printf("qemu: hpet_read w at %" PRIx64 "\n", addr);
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return 0; |
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} |
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#endif |
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static uint32_t hpet_ram_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t hpet_ram_readl(void *opaque, a_target_phys_addr addr)
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{
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HPETState *s = (HPETState *)opaque; |
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uint64_t cur_tick, index; |
| ... | ... | |
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} |
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#ifdef HPET_DEBUG |
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static void hpet_ram_writeb(void *opaque, target_phys_addr_t addr,
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static void hpet_ram_writeb(void *opaque, a_target_phys_addr addr,
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uint32_t value) |
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{
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printf("qemu: invalid hpet_write b at %" PRIx64 " = %#x\n",
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addr, value); |
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} |
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static void hpet_ram_writew(void *opaque, target_phys_addr_t addr,
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static void hpet_ram_writew(void *opaque, a_target_phys_addr addr,
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uint32_t value) |
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{
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printf("qemu: invalid hpet_write w at %" PRIx64 " = %#x\n",
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| ... | ... | |
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} |
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#endif |
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static void hpet_ram_writel(void *opaque, target_phys_addr_t addr,
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static void hpet_ram_writel(void *opaque, a_target_phys_addr addr,
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uint32_t value) |
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{
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int i; |
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