/hw/mac_nvram.c - Diff - qemu - Greek Research and Technology Network's projects

Revision 99a0949b hw/mac_nvram.c

b/hw/mac_nvram.c
38	38	#endif
39	39
40	40	struct MacIONVRAMState {
41		target_phys_addr_t size;
	41	a_target_phys_addr size;
42	42	int mem_index;
43	43	unsigned int it_shift;
44	44	uint8_t *data;
...	...
72	72
73	73	/* macio style NVRAM device */
74	74	static void macio_nvram_writeb (void *opaque,
75		target_phys_addr_t addr, uint32_t value)
	75	a_target_phys_addr addr, uint32_t value)
76	76	{
77	77	MacIONVRAMState *s = opaque;
78	78
...	...
81	81	NVR_DPRINTF("writeb addr %04x val %x\n", (int)addr, value);
82	82	}
83	83
84		static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
	84	static uint32_t macio_nvram_readb (void *opaque, a_target_phys_addr addr)
85	85	{
86	86	MacIONVRAMState *s = opaque;
87	87	uint32_t value;
...	...
128	128	{
129	129	}
130	130
131		MacIONVRAMState macio_nvram_init (int mem_index, target_phys_addr_t size,
	131	MacIONVRAMState macio_nvram_init (int mem_index, a_target_phys_addr size,
132	132	unsigned int it_shift)
133	133	{
134	134	MacIONVRAMState *s;
...	...
148	148	return s;
149	149	}
150	150
151		void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
	151	void macio_nvram_map (void *opaque, a_target_phys_addr mem_base)
152	152	{
153	153	MacIONVRAMState *s;
154	154

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