Revision 99a0949b hw/mips_malta.c

b/hw/mips_malta.c
117 117
#  define logout(fmt, ...) ((void)0)
118 118
#endif
119 119

  
120
struct _eeprom24c0x_t {
120
struct eeprom24c0x {
121 121
  uint8_t tick;
122 122
  uint8_t address;
123 123
  uint8_t command;
......
129 129
  uint8_t contents[256];
130 130
};
131 131

  
132
typedef struct _eeprom24c0x_t eeprom24c0x_t;
132
typedef struct eeprom24c0x a_eeprom24c0x;
133 133

  
134
static eeprom24c0x_t eeprom = {
134
static a_eeprom24c0x eeprom = {
135 135
    .contents = {
136 136
        /* 00000000: */ 0x80,0x08,0x04,0x0D,0x0A,0x01,0x40,0x00,
137 137
        /* 00000008: */ 0x01,0x75,0x54,0x00,0x82,0x08,0x00,0x01,
......
217 217
    eeprom.sda = sda;
218 218
}
219 219

  
220
static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
220
static uint32_t malta_fpga_readl(void *opaque, a_target_phys_addr addr)
221 221
{
222 222
    MaltaFPGAState *s = opaque;
223 223
    uint32_t val = 0;
......
304 304
    return val;
305 305
}
306 306

  
307
static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
307
static void malta_fpga_writel(void *opaque, a_target_phys_addr addr,
308 308
                              uint32_t val)
309 309
{
310 310
    MaltaFPGAState *s = opaque;
......
431 431
    qemu_chr_printf(chr, "+--------+\r\n");
432 432
}
433 433

  
434
static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
434
static MaltaFPGAState *malta_fpga_init(a_target_phys_addr base, qemu_irq uart_irq, CharDriverState *uart_chr)
435 435
{
436 436
    MaltaFPGAState *s;
437 437
    int malta;
......
658 658
static void prom_set(int index, const char *string, ...)
659 659
{
660 660
    char buf[ENVP_ENTRY_SIZE];
661
    target_phys_addr_t p;
661
    a_target_phys_addr p;
662 662
    va_list ap;
663 663
    int32_t table_addr;
664 664

  
......
688 688
    int64_t kernel_entry, kernel_low, kernel_high;
689 689
    int index = 0;
690 690
    long initrd_size;
691
    ram_addr_t initrd_offset;
691
    a_ram_addr initrd_offset;
692 692
    int big_endian;
693 693

  
694 694
#ifdef TARGET_WORDS_BIGENDIAN
......
763 763
}
764 764

  
765 765
static
766
void mips_malta_init (ram_addr_t ram_size,
766
void mips_malta_init (a_ram_addr ram_size,
767 767
                      const char *boot_device,
768 768
                      const char *kernel_filename, const char *kernel_cmdline,
769 769
                      const char *initrd_filename, const char *cpu_model)
770 770
{
771 771
    char *filename;
772
    ram_addr_t ram_offset;
773
    ram_addr_t bios_offset;
772
    a_ram_addr ram_offset;
773
    a_ram_addr bios_offset;
774 774
    target_long bios_size;
775 775
    int64_t kernel_entry;
776 776
    PCIBus *pci_bus;
777 777
    ISADevice *isa_dev;
778 778
    CPUState *env;
779 779
    RTCState *rtc_state;
780
    fdctrl_t *floppy_controller;
780
    a_fdctrl *floppy_controller;
781 781
    MaltaFPGAState *malta_fpga;
782 782
    qemu_irq *i8259;
783 783
    int piix4_devfn;

Also available in: Unified diff