Revision 99a0949b hw/pc.h
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| 9 | 9 |
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SerialState *serial_init(int base, qemu_irq irq, int baudbase, |
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CharDriverState *chr); |
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SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
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SerialState *serial_mm_init (a_target_phys_addr base, int it_shift,
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qemu_irq irq, int baudbase, |
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CharDriverState *chr, int ioregister); |
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typedef struct ParallelState ParallelState; |
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ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr); |
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ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
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ParallelState *parallel_mm_init(a_target_phys_addr base, int it_shift, qemu_irq irq, CharDriverState *chr);
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/* i8259.c */ |
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| 74 | 74 |
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void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); |
| 76 | 76 |
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, |
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target_phys_addr_t base, ram_addr_t size,
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target_phys_addr_t mask);
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a_target_phys_addr base, a_ram_addr size,
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a_target_phys_addr mask);
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/* mc146818rtc.c */ |
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typedef struct RTCState RTCState; |
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RTCState *rtc_init(int base_year); |
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RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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RTCState *rtc_mm_init(a_target_phys_addr base, int it_shift, qemu_irq irq,
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int base_year); |
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void rtc_set_memory(RTCState *s, int addr, int val); |
| 88 | 88 |
void rtc_set_date(RTCState *s, const struct tm *tm); |
| ... | ... | |
| 138 | 138 |
int isa_vga_init(void); |
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int pci_vga_init(PCIBus *bus, |
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unsigned long vga_bios_offset, int vga_bios_size); |
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int isa_vga_mm_init(target_phys_addr_t vram_base,
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target_phys_addr_t ctrl_base, int it_shift);
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int isa_vga_mm_init(a_target_phys_addr vram_base,
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a_target_phys_addr ctrl_base, int it_shift);
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| 143 | 143 |
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/* cirrus_vga.c */ |
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void pci_cirrus_vga_init(PCIBus *bus); |
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