Revision 99a0949b hw/pci_host.h
| b/hw/pci_host.h | ||
|---|---|---|
| 43 | 43 |
PCIBus *bus; |
| 44 | 44 |
} PCIHostState; |
| 45 | 45 |
|
| 46 |
static void pci_host_data_writeb(void* opaque, pci_addr_t addr, uint32_t val)
|
|
| 46 |
static void pci_host_data_writeb(void* opaque, a_pci_addr addr, uint32_t val)
|
|
| 47 | 47 |
{
|
| 48 | 48 |
PCIHostState *s = opaque; |
| 49 | 49 |
|
| 50 | 50 |
PCI_DPRINTF("writeb addr " TARGET_FMT_plx " val %x\n",
|
| 51 |
(target_phys_addr_t)addr, val);
|
|
| 51 |
(a_target_phys_addr)addr, val);
|
|
| 52 | 52 |
if (s->config_reg & (1u << 31)) |
| 53 | 53 |
pci_data_write(s->bus, s->config_reg | (addr & 3), val, 1); |
| 54 | 54 |
} |
| 55 | 55 |
|
| 56 |
static void pci_host_data_writew(void* opaque, pci_addr_t addr, uint32_t val)
|
|
| 56 |
static void pci_host_data_writew(void* opaque, a_pci_addr addr, uint32_t val)
|
|
| 57 | 57 |
{
|
| 58 | 58 |
PCIHostState *s = opaque; |
| 59 | 59 |
#ifdef TARGET_WORDS_BIGENDIAN |
| 60 | 60 |
val = bswap16(val); |
| 61 | 61 |
#endif |
| 62 | 62 |
PCI_DPRINTF("writew addr " TARGET_FMT_plx " val %x\n",
|
| 63 |
(target_phys_addr_t)addr, val);
|
|
| 63 |
(a_target_phys_addr)addr, val);
|
|
| 64 | 64 |
if (s->config_reg & (1u << 31)) |
| 65 | 65 |
pci_data_write(s->bus, s->config_reg | (addr & 3), val, 2); |
| 66 | 66 |
} |
| 67 | 67 |
|
| 68 |
static void pci_host_data_writel(void* opaque, pci_addr_t addr, uint32_t val)
|
|
| 68 |
static void pci_host_data_writel(void* opaque, a_pci_addr addr, uint32_t val)
|
|
| 69 | 69 |
{
|
| 70 | 70 |
PCIHostState *s = opaque; |
| 71 | 71 |
#ifdef TARGET_WORDS_BIGENDIAN |
| 72 | 72 |
val = bswap32(val); |
| 73 | 73 |
#endif |
| 74 | 74 |
PCI_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n",
|
| 75 |
(target_phys_addr_t)addr, val);
|
|
| 75 |
(a_target_phys_addr)addr, val);
|
|
| 76 | 76 |
if (s->config_reg & (1u << 31)) |
| 77 | 77 |
pci_data_write(s->bus, s->config_reg, val, 4); |
| 78 | 78 |
} |
| 79 | 79 |
|
| 80 |
static uint32_t pci_host_data_readb(void* opaque, pci_addr_t addr)
|
|
| 80 |
static uint32_t pci_host_data_readb(void* opaque, a_pci_addr addr)
|
|
| 81 | 81 |
{
|
| 82 | 82 |
PCIHostState *s = opaque; |
| 83 | 83 |
uint32_t val; |
| ... | ... | |
| 86 | 86 |
return 0xff; |
| 87 | 87 |
val = pci_data_read(s->bus, s->config_reg | (addr & 3), 1); |
| 88 | 88 |
PCI_DPRINTF("readb addr " TARGET_FMT_plx " val %x\n",
|
| 89 |
(target_phys_addr_t)addr, val);
|
|
| 89 |
(a_target_phys_addr)addr, val);
|
|
| 90 | 90 |
return val; |
| 91 | 91 |
} |
| 92 | 92 |
|
| 93 |
static uint32_t pci_host_data_readw(void* opaque, pci_addr_t addr)
|
|
| 93 |
static uint32_t pci_host_data_readw(void* opaque, a_pci_addr addr)
|
|
| 94 | 94 |
{
|
| 95 | 95 |
PCIHostState *s = opaque; |
| 96 | 96 |
uint32_t val; |
| ... | ... | |
| 98 | 98 |
return 0xffff; |
| 99 | 99 |
val = pci_data_read(s->bus, s->config_reg | (addr & 3), 2); |
| 100 | 100 |
PCI_DPRINTF("readw addr " TARGET_FMT_plx " val %x\n",
|
| 101 |
(target_phys_addr_t)addr, val);
|
|
| 101 |
(a_target_phys_addr)addr, val);
|
|
| 102 | 102 |
#ifdef TARGET_WORDS_BIGENDIAN |
| 103 | 103 |
val = bswap16(val); |
| 104 | 104 |
#endif |
| 105 | 105 |
return val; |
| 106 | 106 |
} |
| 107 | 107 |
|
| 108 |
static uint32_t pci_host_data_readl(void* opaque, pci_addr_t addr)
|
|
| 108 |
static uint32_t pci_host_data_readl(void* opaque, a_pci_addr addr)
|
|
| 109 | 109 |
{
|
| 110 | 110 |
PCIHostState *s = opaque; |
| 111 | 111 |
uint32_t val; |
| ... | ... | |
| 113 | 113 |
return 0xffffffff; |
| 114 | 114 |
val = pci_data_read(s->bus, s->config_reg | (addr & 3), 4); |
| 115 | 115 |
PCI_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n",
|
| 116 |
(target_phys_addr_t)addr, val);
|
|
| 116 |
(a_target_phys_addr)addr, val);
|
|
| 117 | 117 |
#ifdef TARGET_WORDS_BIGENDIAN |
| 118 | 118 |
val = bswap32(val); |
| 119 | 119 |
#endif |
Also available in: Unified diff