Revision 99a0949b hw/pcnet.c

b/hw/pcnet.c
73 73
    uint8_t buffer[4096];
74 74
    int tx_busy;
75 75
    qemu_irq irq;
76
    void (*phys_mem_read)(void *dma_opaque, target_phys_addr_t addr,
76
    void (*phys_mem_read)(void *dma_opaque, a_target_phys_addr addr,
77 77
                         uint8_t *buf, int len, int do_bswap);
78
    void (*phys_mem_write)(void *dma_opaque, target_phys_addr_t addr,
78
    void (*phys_mem_write)(void *dma_opaque, a_target_phys_addr addr,
79 79
                          uint8_t *buf, int len, int do_bswap);
80 80
    void *dma_opaque;
81 81
    int looptest;
......
349 349
        GET_FIELD((R)->msg_length, RMDM, ZEROS))
350 350

  
351 351
static inline void pcnet_tmd_load(PCNetState *s, struct pcnet_TMD *tmd,
352
                                  target_phys_addr_t addr)
352
                                  a_target_phys_addr addr)
353 353
{
354 354
    if (!BCR_SSIZE32(s)) {
355 355
        struct {
......
379 379
}
380 380

  
381 381
static inline void pcnet_tmd_store(PCNetState *s, const struct pcnet_TMD *tmd,
382
                                   target_phys_addr_t addr)
382
                                   a_target_phys_addr addr)
383 383
{
384 384
    if (!BCR_SSIZE32(s)) {
385 385
        struct {
......
415 415
}
416 416

  
417 417
static inline void pcnet_rmd_load(PCNetState *s, struct pcnet_RMD *rmd,
418
                                  target_phys_addr_t addr)
418
                                  a_target_phys_addr addr)
419 419
{
420 420
    if (!BCR_SSIZE32(s)) {
421 421
        struct {
......
445 445
}
446 446

  
447 447
static inline void pcnet_rmd_store(PCNetState *s, struct pcnet_RMD *rmd,
448
                                   target_phys_addr_t addr)
448
                                   a_target_phys_addr addr)
449 449
{
450 450
    if (!BCR_SSIZE32(s)) {
451 451
        struct {
......
716 716
    return 0;
717 717
}
718 718

  
719
static inline target_phys_addr_t pcnet_rdra_addr(PCNetState *s, int idx)
719
static inline a_target_phys_addr pcnet_rdra_addr(PCNetState *s, int idx)
720 720
{
721 721
    while (idx < 1) idx += CSR_RCVRL(s);
722 722
    return s->rdra + ((CSR_RCVRL(s) - idx) * (BCR_SWSTYLE(s) ? 16 : 8));
......
955 955
    if (s->rdra) {
956 956
        int bad = 0;
957 957
#if 1
958
        target_phys_addr_t crda = pcnet_rdra_addr(s, CSR_RCVRC(s));
959
        target_phys_addr_t nrda = pcnet_rdra_addr(s, -1 + CSR_RCVRC(s));
960
        target_phys_addr_t nnrd = pcnet_rdra_addr(s, -2 + CSR_RCVRC(s));
958
        a_target_phys_addr crda = pcnet_rdra_addr(s, CSR_RCVRC(s));
959
        a_target_phys_addr nrda = pcnet_rdra_addr(s, -1 + CSR_RCVRC(s));
960
        a_target_phys_addr nnrd = pcnet_rdra_addr(s, -2 + CSR_RCVRC(s));
961 961
#else
962
        target_phys_addr_t crda = s->rdra +
962
        a_target_phys_addr crda = s->rdra +
963 963
            (CSR_RCVRL(s) - CSR_RCVRC(s)) *
964 964
            (BCR_SWSTYLE(s) ? 16 : 8 );
965 965
        int nrdc = CSR_RCVRC(s)<=1 ? CSR_RCVRL(s) : CSR_RCVRC(s)-1;
966
        target_phys_addr_t nrda = s->rdra +
966
        a_target_phys_addr nrda = s->rdra +
967 967
            (CSR_RCVRL(s) - nrdc) *
968 968
            (BCR_SWSTYLE(s) ? 16 : 8 );
969 969
        int nnrc = nrdc<=1 ? CSR_RCVRL(s) : nrdc-1;
970
        target_phys_addr_t nnrd = s->rdra +
970
        a_target_phys_addr nnrd = s->rdra +
971 971
            (CSR_RCVRL(s) - nnrc) *
972 972
            (BCR_SWSTYLE(s) ? 16 : 8 );
973 973
#endif
......
1027 1027
{
1028 1028
    s->csr[34] = s->csr[35] = 0;
1029 1029
    if (s->tdra) {
1030
        target_phys_addr_t cxda = s->tdra +
1030
        a_target_phys_addr cxda = s->tdra +
1031 1031
            (CSR_XMTRL(s) - CSR_XMTRC(s)) *
1032 1032
            (BCR_SWSTYLE(s) ? 16 : 8);
1033 1033
        int bad = 0;
......
1109 1109
        if (!(CSR_CRST(s) & 0x8000) && s->rdra) {
1110 1110
            struct pcnet_RMD rmd;
1111 1111
            int rcvrc = CSR_RCVRC(s)-1,i;
1112
            target_phys_addr_t nrda;
1112
            a_target_phys_addr nrda;
1113 1113
            for (i = CSR_RCVRL(s)-1; i > 0; i--, rcvrc--) {
1114 1114
                if (rcvrc <= 1)
1115 1115
                    rcvrc = CSR_RCVRL(s);
......
1137 1137
            CSR_MISSC(s)++;
1138 1138
        } else {
1139 1139
            uint8_t *src = s->buffer;
1140
            target_phys_addr_t crda = CSR_CRDA(s);
1140
            a_target_phys_addr crda = CSR_CRDA(s);
1141 1141
            struct pcnet_RMD rmd;
1142 1142
            int pktcount = 0;
1143 1143

  
......
1177 1177

  
1178 1178
#define PCNET_RECV_STORE() do {                                 \
1179 1179
    int count = MIN(4096 - GET_FIELD(rmd.buf_length, RMDL, BCNT),remaining); \
1180
    target_phys_addr_t rbadr = PHYSADDR(s, rmd.rbadr);          \
1180
    a_target_phys_addr rbadr = PHYSADDR(s, rmd.rbadr);          \
1181 1181
    s->phys_mem_write(s->dma_opaque, rbadr, src, count, CSR_BSWP(s)); \
1182 1182
    src += count; remaining -= count;                           \
1183 1183
    SET_FIELD(&rmd.status, RMDS, OWN, 0);                       \
......
1188 1188
            remaining = size;
1189 1189
            PCNET_RECV_STORE();
1190 1190
            if ((remaining > 0) && CSR_NRDA(s)) {
1191
                target_phys_addr_t nrda = CSR_NRDA(s);
1191
                a_target_phys_addr nrda = CSR_NRDA(s);
1192 1192
#ifdef PCNET_DEBUG_RMD
1193 1193
                PRINT_RMD(&rmd);
1194 1194
#endif
......
1258 1258

  
1259 1259
static void pcnet_transmit(PCNetState *s)
1260 1260
{
1261
    target_phys_addr_t xmit_cxda = 0;
1261
    a_target_phys_addr xmit_cxda = 0;
1262 1262
    int count = CSR_XMTRL(s)-1;
1263 1263
    int add_crc = 0;
1264 1264

  
......
1778 1778
    register_ioport_read(addr + 0x10, 0x10, 4, pcnet_ioport_readl, d);
1779 1779
}
1780 1780

  
1781
static void pcnet_mmio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
1781
static void pcnet_mmio_writeb(void *opaque, a_target_phys_addr addr, uint32_t val)
1782 1782
{
1783 1783
    PCNetState *d = opaque;
1784 1784
#ifdef PCNET_DEBUG_IO
......
1789 1789
        pcnet_aprom_writeb(d, addr & 0x0f, val);
1790 1790
}
1791 1791

  
1792
static uint32_t pcnet_mmio_readb(void *opaque, target_phys_addr_t addr)
1792
static uint32_t pcnet_mmio_readb(void *opaque, a_target_phys_addr addr)
1793 1793
{
1794 1794
    PCNetState *d = opaque;
1795 1795
    uint32_t val = -1;
......
1802 1802
    return val;
1803 1803
}
1804 1804

  
1805
static void pcnet_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
1805
static void pcnet_mmio_writew(void *opaque, a_target_phys_addr addr, uint32_t val)
1806 1806
{
1807 1807
    PCNetState *d = opaque;
1808 1808
#ifdef PCNET_DEBUG_IO
......
1818 1818
    }
1819 1819
}
1820 1820

  
1821
static uint32_t pcnet_mmio_readw(void *opaque, target_phys_addr_t addr)
1821
static uint32_t pcnet_mmio_readw(void *opaque, a_target_phys_addr addr)
1822 1822
{
1823 1823
    PCNetState *d = opaque;
1824 1824
    uint32_t val = -1;
......
1837 1837
    return val;
1838 1838
}
1839 1839

  
1840
static void pcnet_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
1840
static void pcnet_mmio_writel(void *opaque, a_target_phys_addr addr, uint32_t val)
1841 1841
{
1842 1842
    PCNetState *d = opaque;
1843 1843
#ifdef PCNET_DEBUG_IO
......
1855 1855
    }
1856 1856
}
1857 1857

  
1858
static uint32_t pcnet_mmio_readl(void *opaque, target_phys_addr_t addr)
1858
static uint32_t pcnet_mmio_readl(void *opaque, a_target_phys_addr addr)
1859 1859
{
1860 1860
    PCNetState *d = opaque;
1861 1861
    uint32_t val;
......
2000 2000
    cpu_register_physical_memory(addr, PCNET_PNPMMIO_SIZE, d->state.mmio_index);
2001 2001
}
2002 2002

  
2003
static void pci_physical_memory_write(void *dma_opaque, target_phys_addr_t addr,
2003
static void pci_physical_memory_write(void *dma_opaque, a_target_phys_addr addr,
2004 2004
                                      uint8_t *buf, int len, int do_bswap)
2005 2005
{
2006 2006
    cpu_physical_memory_write(addr, buf, len);
2007 2007
}
2008 2008

  
2009
static void pci_physical_memory_read(void *dma_opaque, target_phys_addr_t addr,
2009
static void pci_physical_memory_read(void *dma_opaque, a_target_phys_addr addr,
2010 2010
                                     uint8_t *buf, int len, int do_bswap)
2011 2011
{
2012 2012
    cpu_physical_memory_read(addr, buf, len);
......
2089 2089
        pcnet_h_reset(&d->state);
2090 2090
}
2091 2091

  
2092
static void lance_mem_writew(void *opaque, target_phys_addr_t addr,
2092
static void lance_mem_writew(void *opaque, a_target_phys_addr addr,
2093 2093
                             uint32_t val)
2094 2094
{
2095 2095
    SysBusPCNetState *d = opaque;
......
2100 2100
    pcnet_ioport_writew(&d->state, addr, val & 0xffff);
2101 2101
}
2102 2102

  
2103
static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr)
2103
static uint32_t lance_mem_readw(void *opaque, a_target_phys_addr addr)
2104 2104
{
2105 2105
    SysBusPCNetState *d = opaque;
2106 2106
    uint32_t val;

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