Revision 99a0949b hw/rc4030.c
b/hw/rc4030.c | ||
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109 | 109 |
} |
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/* called for accesses to rc4030 */ |
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static uint32_t rc4030_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t rc4030_readl(void *opaque, a_target_phys_addr addr)
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{ |
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rc4030State *s = opaque; |
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uint32_t val; |
... | ... | |
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return val; |
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} |
248 | 248 |
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static uint32_t rc4030_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t rc4030_readw(void *opaque, a_target_phys_addr addr)
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{ |
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uint32_t v = rc4030_readl(opaque, addr & ~0x3); |
252 | 252 |
if (addr & 0x2) |
... | ... | |
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return v & 0xffff; |
256 | 256 |
} |
257 | 257 |
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static uint32_t rc4030_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t rc4030_readb(void *opaque, a_target_phys_addr addr)
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{ |
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uint32_t v = rc4030_readl(opaque, addr & ~0x3); |
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return (v >> (8 * (addr & 0x3))) & 0xff; |
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} |
263 | 263 |
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static void rc4030_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void rc4030_writel(void *opaque, a_target_phys_addr addr, uint32_t val)
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{ |
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rc4030State *s = opaque; |
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addr &= 0x3fff; |
... | ... | |
304 | 304 |
case 0x0060: |
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/* HACK */ |
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if (s->cache_ltag == 0x80000001 && s->cache_bmask == 0xf0f0f0f) { |
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target_phys_addr_t dest = s->cache_ptag & ~0x1;
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a_target_phys_addr dest = s->cache_ptag & ~0x1;
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dest += (s->cache_maint & 0x3) << 3; |
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cpu_physical_memory_rw(dest, (uint8_t*)&val, 4, 1); |
310 | 310 |
} |
... | ... | |
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} |
387 | 387 |
} |
388 | 388 |
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static void rc4030_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void rc4030_writew(void *opaque, a_target_phys_addr addr, uint32_t val)
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{ |
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uint32_t old_val = rc4030_readl(opaque, addr & ~0x3); |
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... | ... | |
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rc4030_writel(opaque, addr & ~0x3, val); |
398 | 398 |
} |
399 | 399 |
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static void rc4030_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void rc4030_writeb(void *opaque, a_target_phys_addr addr, uint32_t val)
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{ |
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uint32_t old_val = rc4030_readl(opaque, addr & ~0x3); |
403 | 403 |
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... | ... | |
479 | 479 |
qemu_irq_raise(s->timer_irq); |
480 | 480 |
} |
481 | 481 |
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static uint32_t jazzio_readw(void *opaque, target_phys_addr_t addr)
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static uint32_t jazzio_readw(void *opaque, a_target_phys_addr addr)
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{ |
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rc4030State *s = opaque; |
485 | 485 |
uint32_t val; |
... | ... | |
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return val; |
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} |
519 | 519 |
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static uint32_t jazzio_readb(void *opaque, target_phys_addr_t addr)
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static uint32_t jazzio_readb(void *opaque, a_target_phys_addr addr)
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{ |
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uint32_t v; |
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v = jazzio_readw(opaque, addr & ~0x1); |
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return (v >> (8 * (addr & 0x1))) & 0xff; |
525 | 525 |
} |
526 | 526 |
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static uint32_t jazzio_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t jazzio_readl(void *opaque, a_target_phys_addr addr)
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{ |
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uint32_t v; |
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v = jazzio_readw(opaque, addr); |
... | ... | |
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return v; |
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} |
534 | 534 |
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static void jazzio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void jazzio_writew(void *opaque, a_target_phys_addr addr, uint32_t val)
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{ |
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rc4030State *s = opaque; |
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addr &= 0xfff; |
... | ... | |
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} |
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} |
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static void jazzio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void jazzio_writeb(void *opaque, a_target_phys_addr addr, uint32_t val)
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{ |
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uint32_t old_val = jazzio_readw(opaque, addr & ~0x1); |
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... | ... | |
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jazzio_writew(opaque, addr & ~0x1, val); |
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} |
568 | 568 |
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static void jazzio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void jazzio_writel(void *opaque, a_target_phys_addr addr, uint32_t val)
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{ |
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jazzio_writew(opaque, addr, val & 0xffff); |
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jazzio_writew(opaque, addr + 2, (val >> 16) & 0xffff); |
... | ... | |
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qemu_put_be32(f, s->itr); |
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} |
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void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)
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void rc4030_dma_memory_rw(void *opaque, a_target_phys_addr addr, uint8_t *buf, int len, int is_write)
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{ |
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rc4030State *s = opaque; |
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target_phys_addr_t entry_addr;
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target_phys_addr_t phys_addr;
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a_target_phys_addr entry_addr;
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a_target_phys_addr phys_addr;
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dma_pagetable_entry entry; |
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int index; |
686 | 686 |
int ncpy, i; |
... | ... | |
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static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_write) |
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{ |
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rc4030State *s = opaque; |
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target_phys_addr_t dma_addr;
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a_target_phys_addr dma_addr;
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721 | 721 |
int dev_to_mem; |
722 | 722 |
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s->dma_regs[n][DMA_REG_ENABLE] &= ~(DMA_FLAG_TC_INTR | DMA_FLAG_MEM_INTR | DMA_FLAG_ADDR_INTR); |
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