Revision 99a0949b hw/slavio_intctl.c
| b/hw/slavio_intctl.c | ||
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| 83 | 83 |
static void slavio_check_interrupts(SLAVIO_INTCTLState *s, int set_irqs); |
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// per-cpu interrupt controller |
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static uint32_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t slavio_intctl_mem_readl(void *opaque, a_target_phys_addr addr)
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{
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SLAVIO_CPUINTCTLState *s = opaque; |
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uint32_t saddr, ret; |
| ... | ... | |
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return ret; |
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} |
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static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr,
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static void slavio_intctl_mem_writel(void *opaque, a_target_phys_addr addr,
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uint32_t val) |
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{
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SLAVIO_CPUINTCTLState *s = opaque; |
| ... | ... | |
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}; |
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// master system interrupt controller |
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static uint32_t slavio_intctlm_mem_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t slavio_intctlm_mem_readl(void *opaque, a_target_phys_addr addr)
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{
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SLAVIO_INTCTLState *s = opaque; |
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uint32_t saddr, ret; |
| ... | ... | |
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return ret; |
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} |
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static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr,
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static void slavio_intctlm_mem_writel(void *opaque, a_target_phys_addr addr,
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uint32_t val) |
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{
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SLAVIO_INTCTLState *s = opaque; |
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