Revision 99a0949b hw/stellaris.c
| b/hw/stellaris.c | ||
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| 140 | 140 |
gptm_update_irq(s); |
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} |
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static uint32_t gptm_read(void *opaque, target_phys_addr_t offset)
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static uint32_t gptm_read(void *opaque, a_target_phys_addr offset)
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{
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gptm_state *s = (gptm_state *)opaque; |
| 146 | 146 |
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| ... | ... | |
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} |
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} |
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static void gptm_write(void *opaque, target_phys_addr_t offset, uint32_t value)
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static void gptm_write(void *opaque, a_target_phys_addr offset, uint32_t value)
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{
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gptm_state *s = (gptm_state *)opaque; |
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uint32_t oldval; |
| ... | ... | |
| 422 | 422 |
0xb11c /* 8.192 Mhz */ |
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}; |
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static uint32_t ssys_read(void *opaque, target_phys_addr_t offset)
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static uint32_t ssys_read(void *opaque, a_target_phys_addr offset)
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{
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ssys_state *s = (ssys_state *)opaque; |
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| ... | ... | |
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system_clock_scale = 5 * (((s->rcc >> 23) & 0xf) + 1); |
| 509 | 509 |
} |
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static void ssys_write(void *opaque, target_phys_addr_t offset, uint32_t value)
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static void ssys_write(void *opaque, a_target_phys_addr offset, uint32_t value)
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{
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ssys_state *s = (ssys_state *)opaque; |
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| ... | ... | |
| 701 | 701 |
#define STELLARIS_I2C_MCS_IDLE 0x20 |
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#define STELLARIS_I2C_MCS_BUSBSY 0x40 |
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static uint32_t stellaris_i2c_read(void *opaque, target_phys_addr_t offset)
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static uint32_t stellaris_i2c_read(void *opaque, a_target_phys_addr offset)
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{
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stellaris_i2c_state *s = (stellaris_i2c_state *)opaque; |
| 707 | 707 |
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| ... | ... | |
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qemu_set_irq(s->irq, level); |
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} |
| 739 | 739 |
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static void stellaris_i2c_write(void *opaque, target_phys_addr_t offset,
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static void stellaris_i2c_write(void *opaque, a_target_phys_addr offset,
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uint32_t value) |
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{
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stellaris_i2c_state *s = (stellaris_i2c_state *)opaque; |
| ... | ... | |
| 1009 | 1009 |
} |
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} |
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static uint32_t stellaris_adc_read(void *opaque, target_phys_addr_t offset)
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static uint32_t stellaris_adc_read(void *opaque, a_target_phys_addr offset)
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{
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stellaris_adc_state *s = (stellaris_adc_state *)opaque; |
| 1015 | 1015 |
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| ... | ... | |
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} |
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} |
| 1058 | 1058 |
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static void stellaris_adc_write(void *opaque, target_phys_addr_t offset,
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static void stellaris_adc_write(void *opaque, a_target_phys_addr offset,
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uint32_t value) |
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{
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stellaris_adc_state *s = (stellaris_adc_state *)opaque; |
| ... | ... | |
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} |
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/* FIXME: Figure out how to generate these from stellaris_boards. */ |
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static void lm3s811evb_init(ram_addr_t ram_size,
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static void lm3s811evb_init(a_ram_addr ram_size,
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const char *boot_device, |
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const char *kernel_filename, const char *kernel_cmdline, |
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const char *initrd_filename, const char *cpu_model) |
| ... | ... | |
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stellaris_init(kernel_filename, cpu_model, &stellaris_boards[0]); |
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} |
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static void lm3s6965evb_init(ram_addr_t ram_size,
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static void lm3s6965evb_init(a_ram_addr ram_size,
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const char *boot_device, |
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const char *kernel_filename, const char *kernel_cmdline, |
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const char *initrd_filename, const char *cpu_model) |
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