Revision 99a0949b hw/tcx.c
b/hw/tcx.c | ||
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37 | 37 |
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typedef struct TCXState { |
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SysBusDevice busdev; |
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target_phys_addr_t addr;
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a_target_phys_addr addr;
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DisplayState *ds; |
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uint8_t *vram; |
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uint32_t *vram24, *cplane; |
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ram_addr_t vram_offset, vram24_offset, cplane_offset;
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a_ram_addr vram_offset, vram24_offset, cplane_offset;
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uint32_t vram_size; |
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uint16_t width, height, depth; |
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uint8_t r[256], g[256], b[256]; |
... | ... | |
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} |
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} |
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static inline int check_dirty(ram_addr_t page, ram_addr_t page24,
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ram_addr_t cpage)
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static inline int check_dirty(a_ram_addr page, a_ram_addr page24,
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a_ram_addr cpage)
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{ |
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int ret; |
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unsigned int off; |
... | ... | |
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return ret; |
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} |
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static inline void reset_dirty(TCXState *ts, ram_addr_t page_min,
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ram_addr_t page_max, ram_addr_t page24,
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ram_addr_t cpage)
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static inline void reset_dirty(TCXState *ts, a_ram_addr page_min,
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a_ram_addr page_max, a_ram_addr page24,
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a_ram_addr cpage)
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{ |
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cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE, |
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VGA_DIRTY_FLAG); |
... | ... | |
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static void tcx_update_display(void *opaque) |
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{ |
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TCXState *ts = opaque; |
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ram_addr_t page, page_min, page_max;
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a_ram_addr page, page_min, page_max;
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int y, y_start, dd, ds; |
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uint8_t *d, *s; |
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void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width); |
... | ... | |
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static void tcx24_update_display(void *opaque) |
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{ |
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TCXState *ts = opaque; |
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ram_addr_t page, page_min, page_max, cpage, page24;
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a_ram_addr page, page_min, page_max, cpage, page24;
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int y, y_start, dd, ds; |
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uint8_t *d, *s; |
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uint32_t *cptr, *s24; |
... | ... | |
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s->dac_state = 0; |
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} |
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static uint32_t tcx_dac_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t tcx_dac_readl(void *opaque, a_target_phys_addr addr)
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{ |
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return 0; |
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} |
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static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void tcx_dac_writel(void *opaque, a_target_phys_addr addr, uint32_t val)
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{ |
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TCXState *s = opaque; |
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... | ... | |
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tcx_dac_writel, |
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}; |
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static uint32_t tcx_dummy_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t tcx_dummy_readl(void *opaque, a_target_phys_addr addr)
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{ |
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return 0; |
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} |
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static void tcx_dummy_writel(void *opaque, target_phys_addr_t addr,
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static void tcx_dummy_writel(void *opaque, a_target_phys_addr addr,
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uint32_t val) |
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{ |
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} |
... | ... | |
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{ |
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TCXState *s = FROM_SYSBUS(TCXState, dev); |
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int io_memory, dummy_memory; |
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ram_addr_t vram_offset;
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a_ram_addr vram_offset;
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511 | 511 |
int size; |
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uint8_t *vram_base; |
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