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/*
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 * PowerMac MacIO device emulation
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 *
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 * Copyright (c) 2005-2007 Fabrice Bellard
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 * Copyright (c) 2007 Jocelyn Mayer
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "hw.h"
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#include "ppc_mac.h"
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#include "pci.h"
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#include "escc.h"
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typedef struct macio_state a_macio_state;
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struct macio_state {
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    int is_oldworld;
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    int pic_mem_index;
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    int dbdma_mem_index;
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    int cuda_mem_index;
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    int escc_mem_index;
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    void *nvram;
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    int nb_ide;
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    int ide_mem_index[4];
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};
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static void macio_map (PCIDevice *pci_dev, int region_num,
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                       uint32_t addr, uint32_t size, int type)
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{
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    a_macio_state *macio_state;
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    int i;
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    macio_state = (a_macio_state *)(pci_dev + 1);
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    if (macio_state->pic_mem_index >= 0) {
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        if (macio_state->is_oldworld) {
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            /* Heathrow PIC */
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            cpu_register_physical_memory(addr + 0x00000, 0x1000,
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                                         macio_state->pic_mem_index);
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        } else {
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            /* OpenPIC */
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            cpu_register_physical_memory(addr + 0x40000, 0x40000,
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                                         macio_state->pic_mem_index);
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        }
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    }
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    if (macio_state->dbdma_mem_index >= 0) {
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        cpu_register_physical_memory(addr + 0x08000, 0x1000,
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                                     macio_state->dbdma_mem_index);
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    }
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    if (macio_state->escc_mem_index >= 0) {
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        cpu_register_physical_memory(addr + 0x13000, ESCC_SIZE << 4,
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                                     macio_state->escc_mem_index);
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    }
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    if (macio_state->cuda_mem_index >= 0) {
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        cpu_register_physical_memory(addr + 0x16000, 0x2000,
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                                     macio_state->cuda_mem_index);
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    }
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    for (i = 0; i < macio_state->nb_ide; i++) {
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        if (macio_state->ide_mem_index[i] >= 0) {
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            cpu_register_physical_memory(addr + 0x1f000 + (i * 0x1000), 0x1000,
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                                         macio_state->ide_mem_index[i]);
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        }
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    }
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    if (macio_state->nvram != NULL)
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        macio_nvram_map(macio_state->nvram, addr + 0x60000);
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}
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void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
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                 int dbdma_mem_index, int cuda_mem_index, void *nvram,
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                 int nb_ide, int *ide_mem_index, int escc_mem_index)
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{
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    PCIDevice *d;
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    a_macio_state *macio_state;
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    int i;
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    d = pci_register_device(bus, "macio",
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                            sizeof(PCIDevice) + sizeof(a_macio_state),
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                            -1, NULL, NULL);
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    macio_state = (a_macio_state *)(d + 1);
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    macio_state->is_oldworld = is_oldworld;
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    macio_state->pic_mem_index = pic_mem_index;
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    macio_state->dbdma_mem_index = dbdma_mem_index;
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    macio_state->cuda_mem_index = cuda_mem_index;
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    macio_state->escc_mem_index = escc_mem_index;
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    macio_state->nvram = nvram;
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    if (nb_ide > 4)
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        nb_ide = 4;
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    macio_state->nb_ide = nb_ide;
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    for (i = 0; i < nb_ide; i++)
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        macio_state->ide_mem_index[i] = ide_mem_index[i];
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    for (; i < 4; i++)
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        macio_state->ide_mem_index[i] = -1;
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    /* Note: this code is strongly inspirated from the corresponding code
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       in PearPC */
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    pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
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    pci_config_set_device_id(d->config, device_id);
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    pci_config_set_class(d->config, PCI_CLASS_OTHERS << 8);
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    d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
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    d->config[0x3d] = 0x01; // interrupt on pin 1
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    pci_register_bar(d, 0, 0x80000,
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                           PCI_ADDRESS_SPACE_MEM, macio_map);
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}