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tcg-target.c 58.6 kB
tcg-target.h 2.8 kB

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# Date Author Comment
9a3abc21 01/08/2011 05:41 pm Aurelien Jarno

tcg/arm: fix qemu_st64 for big endian targets

Due to a typo, qemu_st64 doesn't properly byteswap the 32-bit low word of
a 64 bit word before saving it. This patch fixes that.

Acked-by: Andrzej Zaborowski <>
Signed-off-by: Aurelien Jarno <>

c69806ab 01/08/2011 05:39 pm Aurelien Jarno

tcg/arm: fix branch target change during code retranslation

QEMU uses code retranslation to restore the CPU state when an exception
happens. For it to work the retranslation must not modify the generated
code. This is what is currently implemented in ARM TCG....

e4d58b41 06/09/2010 12:18 pm Richard Henderson

tcg: Make some tcg-target.c routines static.

Both tcg_target_init and tcg_target_qemu_prologue
are unused outside of tcg.c.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

3b6dac34 06/09/2010 12:18 pm Richard Henderson

tcg: Add TYPE parameter to tcg_out_mov.

Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64
to perform the move at the proper width, which may elide a REX prefix.

Introduce a TCG_TYPE_REG enumerator to represent the "native width"
of the host register, and to distinguish the usage from "pointer data"...

e23886a9 04/25/2010 06:46 am Aurelien Jarno

tcg/arm: fix condition in zero/sign extension functions

Signed-off-by: Aurelien Jarno <>

67dcab73 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: bswap arguments in qemu_ld/st if needed

On big endian targets, data arguments of qemu_ld/st ops have to be
byte swapped. Two temporary registers are needed for qemu_st to do
the bswap. r0 and r1 are used in system mode, do the same in user
mode, which implies reworking the constraints....

2633a2d0 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: remove useless register tests in qemu_ld/st

addr_reg, data_reg and data_reg2 can't be register r0 or r1 du to the
constraints. Don't check if they equals these registers.

Signed-off-by: Aurelien Jarno <>

bf5675ef 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: fix argument alignment in qemu_st64

64-bit arguments should be aligned on an even register as specified
by the "Procedure Call Standard for the ARM Architecture".

Signed-off-by: Aurelien Jarno <>

914ccf51 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: optimize register allocation order

The beginning of the register allocation order list on the TCG arm
target matches the list of clobbered registers. This means that when an
helper is called, there is almost always clobbered registers that have
to be spilled....

c66b5c2c 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: don't try to load constants using pc

There is statistically almost 0 chances to use this code, so
remove it.

Signed-off-by: Aurelien Jarno <>

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