Revision 9a78eead

b/cpu-all.h
765 765
CPUState *cpu_copy(CPUState *env);
766 766
CPUState *qemu_get_cpu(int cpu);
767 767

  
768
void cpu_dump_state(CPUState *env, FILE *f,
769
                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
768
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
770 769
                    int flags);
771
void cpu_dump_statistics (CPUState *env, FILE *f,
772
                          int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
773
                          int flags);
770
void cpu_dump_statistics(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
771
                         int flags);
774 772

  
775 773
void QEMU_NORETURN cpu_abort(CPUState *env, const char *fmt, ...)
776 774
    GCC_FMT_ATTR(2, 3);
b/cpus.c
978 978
    return qemu_icount_bias + (icount << icount_time_shift);
979 979
}
980 980

  
981
void list_cpus(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
982
               const char *optarg)
981
void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
983 982
{
984 983
    /* XXX: implement xxx_cpu_list for targets that still miss it */
985 984
#if defined(cpu_list_id)
b/cpus.h
16 16
bool cpu_exec_all(void);
17 17
void set_numa_modes(void);
18 18
void set_cpu_log(const char *optarg);
19
void list_cpus(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
20
               const char *optarg);
19
void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg);
21 20

  
22 21
#endif
b/target-alpha/helper.c
537 537
}
538 538
#endif
539 539

  
540
void cpu_dump_state (CPUState *env, FILE *f,
541
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
540
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
542 541
                     int flags)
543 542
{
544 543
    static const char *linux_reg_names[] = {
b/target-arm/cpu.h
25 25

  
26 26
#define CPUState struct CPUARMState
27 27

  
28
#include "config.h"
29
#include "qemu-common.h"
28 30
#include "cpu-defs.h"
29 31

  
30 32
#include "softfloat.h"
......
353 355
    return (env->features & (1u << feature)) != 0;
354 356
}
355 357

  
356
void arm_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
358
void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
357 359

  
358 360
/* Interface between CPU and Interrupt controller.  */
359 361
void armv7m_nvic_set_pending(void *opaque, int irq);
b/target-arm/helper.c
348 348
    { 0, NULL}
349 349
};
350 350

  
351
void arm_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
351
void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
352 352
{
353 353
    int i;
354 354

  
b/target-arm/translate.c
9262 9262
  "???", "???", "???", "und", "???", "???", "???", "sys"
9263 9263
};
9264 9264

  
9265
void cpu_dump_state(CPUState *env, FILE *f,
9266
                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
9265
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
9267 9266
                    int flags)
9268 9267
{
9269 9268
    int i;
b/target-cris/cpu.h
263 263
}
264 264

  
265 265
#define cpu_list cris_cpu_list
266
void cris_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
266
void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
267 267

  
268 268
#endif
b/target-cris/translate.c
3426 3426
    gen_intermediate_code_internal(env, tb, 1);
3427 3427
}
3428 3428

  
3429
void cpu_dump_state (CPUState *env, FILE *f,
3430
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
3429
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
3431 3430
                     int flags)
3432 3431
{
3433 3432
	int i;
......
3480 3479
	{32, "crisv32"},
3481 3480
};
3482 3481

  
3483
void cris_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
3482
void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
3484 3483
{
3485 3484
    unsigned int i;
3486 3485

  
b/target-i386/cpu.h
20 20
#define CPU_I386_H
21 21

  
22 22
#include "config.h"
23
#include "qemu-common.h"
23 24

  
24 25
#ifdef TARGET_X86_64
25 26
#define TARGET_LONG_BITS 64
......
756 757
CPUX86State *cpu_x86_init(const char *cpu_model);
757 758
int cpu_x86_exec(CPUX86State *s);
758 759
void cpu_x86_close(CPUX86State *s);
759
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
760
                   const char *optarg);
760
void x86_cpu_list (FILE *f, fprintf_function cpu_fprintf, const char *optarg);
761 761
void x86_cpudef_setup(void);
762 762

  
763 763
int cpu_get_pic_interrupt(CPUX86State *s);
b/target-i386/cpuid.c
762 762
 * -?dump    output all model (x86_def_t) data
763 763
 * -?cpuid   list all recognized cpuid flag names
764 764
 */
765
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
766
                  const char *optarg)
765
void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
767 766
{
768 767
    unsigned char model = !strcmp("?model", optarg);
769 768
    unsigned char dump = !strcmp("?dump", optarg);
b/target-i386/helper.c
169 169
};
170 170

  
171 171
static void
172
cpu_x86_dump_seg_cache(CPUState *env, FILE *f,
173
                       int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
172
cpu_x86_dump_seg_cache(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
174 173
                       const char *name, struct SegmentCache *sc)
175 174
{
176 175
#ifdef TARGET_X86_64
......
224 223
    cpu_fprintf(f, "\n");
225 224
}
226 225

  
227
void cpu_dump_state(CPUState *env, FILE *f,
228
                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
226
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
229 227
                    int flags)
230 228
{
231 229
    int eflags, i, nb;
......
335 333
                    (uint32_t)env->cr[2],
336 334
                    (uint32_t)env->cr[3],
337 335
                    (uint32_t)env->cr[4]);
338
        for(i = 0; i < 4; i++)
339
            cpu_fprintf(f, "DR%d=%08x ", i, env->dr[i]);
340
        cpu_fprintf(f, "\nDR6=%08x DR7=%08x\n", env->dr[6], env->dr[7]);
336
        for(i = 0; i < 4; i++) {
337
            cpu_fprintf(f, "DR%d=" TARGET_FMT_lx " ", i, env->dr[i]);
338
        }
339
        cpu_fprintf(f, "\nDR6=" TARGET_FMT_lx " DR7=" TARGET_FMT_lx "\n",
340
                    env->dr[6], env->dr[7]);
341 341
    }
342 342
    if (flags & X86_DUMP_CCOP) {
343 343
        if ((unsigned)env->cc_op < CC_OP_NB)
b/target-m68k/cpu.h
24 24

  
25 25
#define CPUState struct CPUM68KState
26 26

  
27
#include "qemu-common.h"
27 28
#include "cpu-defs.h"
28 29

  
29 30
#include "softfloat.h"
......
198 199
    return (env->features & (1u << feature)) != 0;
199 200
}
200 201

  
201
void m68k_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
202
void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf);
202 203

  
203 204
void register_m68k_insns (CPUM68KState *env);
204 205

  
b/target-m68k/helper.c
53 53
    {NULL, 0},
54 54
};
55 55

  
56
void m68k_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
56
void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
57 57
{
58 58
    unsigned int i;
59 59

  
b/target-m68k/translate.c
3092 3092
    gen_intermediate_code_internal(env, tb, 1);
3093 3093
}
3094 3094

  
3095
void cpu_dump_state(CPUState *env, FILE *f,
3096
                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
3095
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
3097 3096
                    int flags)
3098 3097
{
3099 3098
    int i;
b/target-microblaze/translate.c
1534 1534
    gen_intermediate_code_internal(env, tb, 1);
1535 1535
}
1536 1536

  
1537
void cpu_dump_state (CPUState *env, FILE *f,
1538
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
1537
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
1539 1538
                     int flags)
1540 1539
{
1541 1540
    int i;
b/target-mips/cpu.h
8 8
#define CPUState struct CPUMIPSState
9 9

  
10 10
#include "config.h"
11
#include "qemu-common.h"
11 12
#include "mips-defs.h"
12 13
#include "cpu-defs.h"
13 14
#include "softfloat.h"
......
496 497
                          int unused, int size);
497 498
#endif
498 499

  
499
void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
500
void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
500 501

  
501 502
#define cpu_init cpu_mips_init
502 503
#define cpu_exec cpu_mips_exec
b/target-mips/translate.c
12450 12450
    gen_intermediate_code_internal(env, tb, 1);
12451 12451
}
12452 12452

  
12453
static void fpu_dump_state(CPUState *env, FILE *f,
12454
                           int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
12453
static void fpu_dump_state(CPUState *env, FILE *f, fprintf_function fpu_fprintf,
12455 12454
                           int flags)
12456 12455
{
12457 12456
    int i;
......
12480 12479
    } while(0)
12481 12480

  
12482 12481

  
12483
    fpu_fprintf(f, "CP1 FCR0 0x%08x  FCR31 0x%08x  SR.FR %d  fp_status 0x%08x(0x%02x)\n",
12484
                env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64, env->active_fpu.fp_status,
12482
    fpu_fprintf(f, "CP1 FCR0 0x%08x  FCR31 0x%08x  SR.FR %d  fp_status 0x%02x\n",
12483
                env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64,
12485 12484
                get_float_exception_flags(&env->active_fpu.fp_status));
12486 12485
    for (i = 0; i < 32; (is_fpu64) ? i++ : (i += 2)) {
12487 12486
        fpu_fprintf(f, "%3s: ", fregnames[i]);
......
12499 12498

  
12500 12499
static void
12501 12500
cpu_mips_check_sign_extensions (CPUState *env, FILE *f,
12502
                                int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
12501
                                fprintf_function cpu_fprintf,
12503 12502
                                int flags)
12504 12503
{
12505 12504
    int i;
......
12525 12524
}
12526 12525
#endif
12527 12526

  
12528
void cpu_dump_state (CPUState *env, FILE *f,
12529
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
12527
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
12530 12528
                     int flags)
12531 12529
{
12532 12530
    int i;
b/target-mips/translate_init.c
500 500
    return NULL;
501 501
}
502 502

  
503
void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
503
void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf)
504 504
{
505 505
    int i;
506 506

  
b/target-ppc/cpu.h
20 20
#define __CPU_PPC_H__
21 21

  
22 22
#include "config.h"
23
#include <inttypes.h>
23
#include "qemu-common.h"
24 24

  
25 25
//#define PPC_EMULATE_32BITS_HYPV
26 26

  
......
761 761
#endif /* !defined(CONFIG_USER_ONLY) */
762 762
void ppc_store_msr (CPUPPCState *env, target_ulong value);
763 763

  
764
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
764
void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf);
765 765

  
766 766
const ppc_def_t *cpu_ppc_find_by_name (const char *name);
767 767
int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def);
b/target-ppc/translate.c
8830 8830

  
8831 8831
/*****************************************************************************/
8832 8832
/* Misc PowerPC helpers */
8833
void cpu_dump_state (CPUState *env, FILE *f,
8834
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
8833
void cpu_dump_state (CPUState *env, FILE *f, fprintf_function cpu_fprintf,
8835 8834
                     int flags)
8836 8835
{
8837 8836
#define RGPL  4
......
8840 8839
    int i;
8841 8840

  
8842 8841
    cpu_fprintf(f, "NIP " TARGET_FMT_lx "   LR " TARGET_FMT_lx " CTR "
8843
                TARGET_FMT_lx " XER %08x\n", env->nip, env->lr, env->ctr,
8844
                env->xer);
8842
                TARGET_FMT_lx " XER " TARGET_FMT_lx "\n",
8843
                env->nip, env->lr, env->ctr, env->xer);
8845 8844
    cpu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx "  HF "
8846 8845
                TARGET_FMT_lx " idx %d\n", env->msr, env->spr[SPR_HID0],
8847 8846
                env->hflags, env->mmu_idx);
8848 8847
#if !defined(NO_TIMER_DUMP)
8849
    cpu_fprintf(f, "TB %08x %08x "
8848
    cpu_fprintf(f, "TB %08" PRIu32 " %08" PRIu64
8850 8849
#if !defined(CONFIG_USER_ONLY)
8851
                "DECR %08x"
8850
                " DECR %08" PRIu32
8852 8851
#endif
8853 8852
                "\n",
8854 8853
                cpu_ppc_load_tbu(env), cpu_ppc_load_tbl(env)
......
8898 8897
#undef RFPL
8899 8898
}
8900 8899

  
8901
void cpu_dump_statistics (CPUState *env, FILE*f,
8902
                          int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
8900
void cpu_dump_statistics (CPUState *env, FILE*f, fprintf_function cpu_fprintf,
8903 8901
                          int flags)
8904 8902
{
8905 8903
#if defined(DO_PPC_STATISTICS)
b/target-ppc/translate_init.c
9756 9756
    return ret;
9757 9757
}
9758 9758

  
9759
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
9759
void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf)
9760 9760
{
9761 9761
    int i, max;
9762 9762

  
b/target-s390x/translate.c
23 23
#include "tcg-op.h"
24 24
#include "qemu-log.h"
25 25

  
26
void cpu_dump_state(CPUState *env, FILE *f,
27
                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
26
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
28 27
                    int flags)
29 28
{
30 29
    int i;
b/target-sh4/cpu.h
20 20
#define _CPU_SH4_H
21 21

  
22 22
#include "config.h"
23
#include "qemu-common.h"
23 24

  
24 25
#define TARGET_LONG_BITS 32
25 26
#define TARGET_HAS_ICE 1
......
168 169
#define cpu_handle_mmu_fault cpu_sh4_handle_mmu_fault
169 170
void do_interrupt(CPUSH4State * env);
170 171

  
171
void sh4_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
172
void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf);
172 173
#if !defined(CONFIG_USER_ONLY)
173 174
void cpu_sh4_invalidate_tlb(CPUSH4State *s);
174 175
void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr,
b/target-sh4/translate.c
257 257
    return NULL;
258 258
}
259 259

  
260
void sh4_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
260
void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf)
261 261
{
262 262
    int i;
263 263

  
b/target-sparc/helper.c
1323 1323
    "gl",
1324 1324
};
1325 1325

  
1326
static void print_features(FILE *f,
1327
                           int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
1326
static void print_features(FILE *f, fprintf_function cpu_fprintf,
1328 1327
                           uint32_t features, const char *prefix)
1329 1328
{
1330 1329
    unsigned int i;
......
1452 1451
    return -1;
1453 1452
}
1454 1453

  
1455
void sparc_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
1454
void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf)
1456 1455
{
1457 1456
    unsigned int i;
1458 1457

  
......
1479 1478
                   "fpu_version mmu_version nwindows\n");
1480 1479
}
1481 1480

  
1482
static void cpu_print_cc(FILE *f,
1483
                         int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
1481
static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf,
1484 1482
                         uint32_t cc)
1485 1483
{
1486 1484
    cpu_fprintf(f, "%c%c%c%c", cc & PSR_NEG? 'N' : '-',
......
1494 1492
#define REGS_PER_LINE 8
1495 1493
#endif
1496 1494

  
1497
void cpu_dump_state(CPUState *env, FILE *f,
1498
                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
1495
void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
1499 1496
                    int flags)
1500 1497
{
1501 1498
    int i, x;

Also available in: Unified diff