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1 | 87ecb68b | pbrook | #ifndef QEMU_PCI_H
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2 | 87ecb68b | pbrook | #define QEMU_PCI_H
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3 | 87ecb68b | pbrook | |
4 | 376253ec | aliguori | #include "qemu-common.h" |
5 | 163c8a59 | Luiz Capitulino | #include "qobject.h" |
6 | 376253ec | aliguori | |
7 | 6b1b92d3 | Paul Brook | #include "qdev.h" |
8 | 6b1b92d3 | Paul Brook | |
9 | 87ecb68b | pbrook | /* PCI includes legacy ISA access. */
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10 | 87ecb68b | pbrook | #include "isa.h" |
11 | 87ecb68b | pbrook | |
12 | 0428527c | Isaku Yamahata | #include "pcie.h" |
13 | 0428527c | Isaku Yamahata | |
14 | 87ecb68b | pbrook | /* PCI bus */
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15 | 87ecb68b | pbrook | |
16 | 3ae80618 | aliguori | #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) |
17 | 3ae80618 | aliguori | #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
18 | 3ae80618 | aliguori | #define PCI_FUNC(devfn) ((devfn) & 0x07) |
19 | 6fa84913 | Isaku Yamahata | #define PCI_FUNC_MAX 8 |
20 | 3ae80618 | aliguori | |
21 | a770dc7e | aliguori | /* Class, Vendor and Device IDs from Linux's pci_ids.h */
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22 | a770dc7e | aliguori | #include "pci_ids.h" |
23 | 173a543b | blueswir1 | |
24 | a770dc7e | aliguori | /* QEMU-specific Vendor and Device ID definitions */
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25 | 6f338c34 | aliguori | |
26 | a770dc7e | aliguori | /* IBM (0x1014) */
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27 | a770dc7e | aliguori | #define PCI_DEVICE_ID_IBM_440GX 0x027f |
28 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff |
29 | deb54399 | aliguori | |
30 | a770dc7e | aliguori | /* Hitachi (0x1054) */
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31 | deb54399 | aliguori | #define PCI_VENDOR_ID_HITACHI 0x1054 |
32 | a770dc7e | aliguori | #define PCI_DEVICE_ID_HITACHI_SH7751R 0x350e |
33 | deb54399 | aliguori | |
34 | a770dc7e | aliguori | /* Apple (0x106b) */
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35 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_343S1201 0x0010 |
36 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e |
37 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f |
38 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022 |
39 | a770dc7e | aliguori | #define PCI_DEVICE_ID_APPLE_IPID_USB 0x003f |
40 | deb54399 | aliguori | |
41 | a770dc7e | aliguori | /* Realtek (0x10ec) */
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42 | a770dc7e | aliguori | #define PCI_DEVICE_ID_REALTEK_8029 0x8029 |
43 | deb54399 | aliguori | |
44 | a770dc7e | aliguori | /* Xilinx (0x10ee) */
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45 | a770dc7e | aliguori | #define PCI_DEVICE_ID_XILINX_XC2VP30 0x0300 |
46 | deb54399 | aliguori | |
47 | a770dc7e | aliguori | /* Marvell (0x11ab) */
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48 | a770dc7e | aliguori | #define PCI_DEVICE_ID_MARVELL_GT6412X 0x4620 |
49 | deb54399 | aliguori | |
50 | a770dc7e | aliguori | /* QEMU/Bochs VGA (0x1234) */
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51 | 4ebcf884 | blueswir1 | #define PCI_VENDOR_ID_QEMU 0x1234 |
52 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_QEMU_VGA 0x1111 |
53 | 4ebcf884 | blueswir1 | |
54 | a770dc7e | aliguori | /* VMWare (0x15ad) */
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55 | deb54399 | aliguori | #define PCI_VENDOR_ID_VMWARE 0x15ad |
56 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 |
57 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 |
58 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_NET 0x0720 |
59 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SCSI 0x0730 |
60 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_IDE 0x1729 |
61 | deb54399 | aliguori | |
62 | cef3017c | aliguori | /* Intel (0x8086) */
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63 | a770dc7e | aliguori | #define PCI_DEVICE_ID_INTEL_82551IT 0x1209 |
64 | d6fd1e66 | Stefan Weil | #define PCI_DEVICE_ID_INTEL_82557 0x1229 |
65 | 74c62ba8 | aurel32 | |
66 | deb54399 | aliguori | /* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */
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67 | d350d97d | aliguori | #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 |
68 | d350d97d | aliguori | #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 |
69 | d350d97d | aliguori | #define PCI_SUBDEVICE_ID_QEMU 0x1100 |
70 | d350d97d | aliguori | |
71 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_NET 0x1000 |
72 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BLOCK 0x1001 |
73 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002 |
74 | 14d50bef | aliguori | #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003 |
75 | d350d97d | aliguori | |
76 | 4f8589e1 | Isaku Yamahata | #define FMT_PCIBUS PRIx64
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77 | 6e355d90 | Isaku Yamahata | |
78 | 87ecb68b | pbrook | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
79 | 87ecb68b | pbrook | uint32_t address, uint32_t data, int len);
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80 | 87ecb68b | pbrook | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
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81 | 87ecb68b | pbrook | uint32_t address, int len);
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82 | 87ecb68b | pbrook | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
83 | 6e355d90 | Isaku Yamahata | pcibus_t addr, pcibus_t size, int type);
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84 | 5851e08c | aliguori | typedef int PCIUnregisterFunc(PCIDevice *pci_dev); |
85 | 87ecb68b | pbrook | |
86 | 87ecb68b | pbrook | typedef struct PCIIORegion { |
87 | 6e355d90 | Isaku Yamahata | pcibus_t addr; /* current PCI mapping address. -1 means not mapped */
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88 | 6e355d90 | Isaku Yamahata | #define PCI_BAR_UNMAPPED (~(pcibus_t)0) |
89 | 6e355d90 | Isaku Yamahata | pcibus_t size; |
90 | a0c7a97e | Isaku Yamahata | pcibus_t filtered_size; |
91 | 87ecb68b | pbrook | uint8_t type; |
92 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func; |
93 | 87ecb68b | pbrook | } PCIIORegion; |
94 | 87ecb68b | pbrook | |
95 | 87ecb68b | pbrook | #define PCI_ROM_SLOT 6 |
96 | 87ecb68b | pbrook | #define PCI_NUM_REGIONS 7 |
97 | 87ecb68b | pbrook | |
98 | fb58a897 | Isaku Yamahata | #include "pci_regs.h" |
99 | fb58a897 | Isaku Yamahata | |
100 | fb58a897 | Isaku Yamahata | /* PCI HEADER_TYPE */
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101 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80 |
102 | 8098ed41 | aurel32 | |
103 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config header */
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104 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_HEADER_SIZE 0x40 |
105 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config space */
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106 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_SPACE_SIZE 0x100 |
107 | a9f49946 | Isaku Yamahata | /* Size of the standart PCIe config space: 4KB */
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108 | a9f49946 | Isaku Yamahata | #define PCIE_CONFIG_SPACE_SIZE 0x1000 |
109 | b7ee1603 | Michael S. Tsirkin | |
110 | e369cad7 | Isaku Yamahata | #define PCI_NUM_PINS 4 /* A-D */ |
111 | e369cad7 | Isaku Yamahata | |
112 | 02eb84d0 | Michael S. Tsirkin | /* Bits in cap_present field. */
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113 | 02eb84d0 | Michael S. Tsirkin | enum {
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114 | e4c7d2ae | Isaku Yamahata | QEMU_PCI_CAP_MSI = 0x1,
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115 | e4c7d2ae | Isaku Yamahata | QEMU_PCI_CAP_MSIX = 0x2,
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116 | e4c7d2ae | Isaku Yamahata | QEMU_PCI_CAP_EXPRESS = 0x4,
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117 | 49823868 | Isaku Yamahata | |
118 | 49823868 | Isaku Yamahata | /* multifunction capable device */
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119 | e4c7d2ae | Isaku Yamahata | #define QEMU_PCI_CAP_MULTIFUNCTION_BITNR 3 |
120 | 49823868 | Isaku Yamahata | QEMU_PCI_CAP_MULTIFUNCTION = (1 << QEMU_PCI_CAP_MULTIFUNCTION_BITNR),
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121 | 02eb84d0 | Michael S. Tsirkin | }; |
122 | 02eb84d0 | Michael S. Tsirkin | |
123 | 87ecb68b | pbrook | struct PCIDevice {
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124 | 6b1b92d3 | Paul Brook | DeviceState qdev; |
125 | 87ecb68b | pbrook | /* PCI config space */
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126 | a9f49946 | Isaku Yamahata | uint8_t *config; |
127 | b7ee1603 | Michael S. Tsirkin | |
128 | bd4b65ee | Michael S. Tsirkin | /* Used to enable config checks on load. Note that writeable bits are
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129 | bd4b65ee | Michael S. Tsirkin | * never checked even if set in cmask. */
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130 | a9f49946 | Isaku Yamahata | uint8_t *cmask; |
131 | bd4b65ee | Michael S. Tsirkin | |
132 | b7ee1603 | Michael S. Tsirkin | /* Used to implement R/W bytes */
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133 | a9f49946 | Isaku Yamahata | uint8_t *wmask; |
134 | 87ecb68b | pbrook | |
135 | 92ba5f51 | Isaku Yamahata | /* Used to implement RW1C(Write 1 to Clear) bytes */
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136 | 92ba5f51 | Isaku Yamahata | uint8_t *w1cmask; |
137 | 92ba5f51 | Isaku Yamahata | |
138 | 6f4cbd39 | Michael S. Tsirkin | /* Used to allocate config space for capabilities. */
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139 | a9f49946 | Isaku Yamahata | uint8_t *used; |
140 | 6f4cbd39 | Michael S. Tsirkin | |
141 | 87ecb68b | pbrook | /* the following fields are read only */
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142 | 87ecb68b | pbrook | PCIBus *bus; |
143 | 54586bd1 | Gerd Hoffmann | uint32_t devfn; |
144 | 87ecb68b | pbrook | char name[64]; |
145 | 87ecb68b | pbrook | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
146 | 87ecb68b | pbrook | |
147 | 87ecb68b | pbrook | /* do not access the following fields */
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148 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read; |
149 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write; |
150 | 87ecb68b | pbrook | |
151 | 87ecb68b | pbrook | /* IRQ objects for the INTA-INTD pins. */
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152 | 87ecb68b | pbrook | qemu_irq *irq; |
153 | 87ecb68b | pbrook | |
154 | 87ecb68b | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
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155 | d036bb21 | Michael S. Tsirkin | uint8_t irq_state; |
156 | 02eb84d0 | Michael S. Tsirkin | |
157 | 02eb84d0 | Michael S. Tsirkin | /* Capability bits */
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158 | 02eb84d0 | Michael S. Tsirkin | uint32_t cap_present; |
159 | 02eb84d0 | Michael S. Tsirkin | |
160 | 02eb84d0 | Michael S. Tsirkin | /* Offset of MSI-X capability in config space */
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161 | 02eb84d0 | Michael S. Tsirkin | uint8_t msix_cap; |
162 | 02eb84d0 | Michael S. Tsirkin | |
163 | 02eb84d0 | Michael S. Tsirkin | /* MSI-X entries */
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164 | 02eb84d0 | Michael S. Tsirkin | int msix_entries_nr;
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165 | 02eb84d0 | Michael S. Tsirkin | |
166 | 02eb84d0 | Michael S. Tsirkin | /* Space to store MSIX table */
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167 | 02eb84d0 | Michael S. Tsirkin | uint8_t *msix_table_page; |
168 | 02eb84d0 | Michael S. Tsirkin | /* MMIO index used to map MSIX table and pending bit entries. */
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169 | 02eb84d0 | Michael S. Tsirkin | int msix_mmio_index;
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170 | 02eb84d0 | Michael S. Tsirkin | /* Reference-count for entries actually in use by driver. */
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171 | 02eb84d0 | Michael S. Tsirkin | unsigned *msix_entry_used;
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172 | 02eb84d0 | Michael S. Tsirkin | /* Region including the MSI-X table */
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173 | 02eb84d0 | Michael S. Tsirkin | uint32_t msix_bar_size; |
174 | f16c4abf | Juan Quintela | /* Version id needed for VMState */
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175 | f16c4abf | Juan Quintela | int32_t version_id; |
176 | c2039bd0 | Anthony Liguori | |
177 | e4c7d2ae | Isaku Yamahata | /* Offset of MSI capability in config space */
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178 | e4c7d2ae | Isaku Yamahata | uint8_t msi_cap; |
179 | e4c7d2ae | Isaku Yamahata | |
180 | 0428527c | Isaku Yamahata | /* PCI Express */
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181 | 0428527c | Isaku Yamahata | PCIExpressDevice exp; |
182 | 0428527c | Isaku Yamahata | |
183 | c2039bd0 | Anthony Liguori | /* Location of option rom */
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184 | 8c52c8f3 | Gerd Hoffmann | char *romfile;
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185 | c2039bd0 | Anthony Liguori | ram_addr_t rom_offset; |
186 | 88169ddf | Gerd Hoffmann | uint32_t rom_bar; |
187 | 87ecb68b | pbrook | }; |
188 | 87ecb68b | pbrook | |
189 | 87ecb68b | pbrook | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
190 | 87ecb68b | pbrook | int instance_size, int devfn, |
191 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read, |
192 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write); |
193 | 87ecb68b | pbrook | |
194 | 28c2c264 | Avi Kivity | void pci_register_bar(PCIDevice *pci_dev, int region_num, |
195 | 0bb750ef | Isaku Yamahata | pcibus_t size, uint8_t type, |
196 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func); |
197 | 87ecb68b | pbrook | |
198 | ca77089d | Isaku Yamahata | int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
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199 | ca77089d | Isaku Yamahata | uint8_t offset, uint8_t size); |
200 | 6f4cbd39 | Michael S. Tsirkin | |
201 | 6f4cbd39 | Michael S. Tsirkin | void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
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202 | 6f4cbd39 | Michael S. Tsirkin | |
203 | 6f4cbd39 | Michael S. Tsirkin | void pci_reserve_capability(PCIDevice *pci_dev, uint8_t offset, uint8_t size);
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204 | 6f4cbd39 | Michael S. Tsirkin | |
205 | 6f4cbd39 | Michael S. Tsirkin | uint8_t pci_find_capability(PCIDevice *pci_dev, uint8_t cap_id); |
206 | 6f4cbd39 | Michael S. Tsirkin | |
207 | 6f4cbd39 | Michael S. Tsirkin | |
208 | 87ecb68b | pbrook | uint32_t pci_default_read_config(PCIDevice *d, |
209 | 87ecb68b | pbrook | uint32_t address, int len);
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210 | 87ecb68b | pbrook | void pci_default_write_config(PCIDevice *d,
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211 | 87ecb68b | pbrook | uint32_t address, uint32_t val, int len);
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212 | 87ecb68b | pbrook | void pci_device_save(PCIDevice *s, QEMUFile *f);
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213 | 87ecb68b | pbrook | int pci_device_load(PCIDevice *s, QEMUFile *f);
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214 | 87ecb68b | pbrook | |
215 | 5d4e84c8 | Juan Quintela | typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level); |
216 | 87ecb68b | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
217 | e927d487 | Michael S. Tsirkin | |
218 | e927d487 | Michael S. Tsirkin | typedef enum { |
219 | e927d487 | Michael S. Tsirkin | PCI_HOTPLUG_DISABLED, |
220 | e927d487 | Michael S. Tsirkin | PCI_HOTPLUG_ENABLED, |
221 | e927d487 | Michael S. Tsirkin | PCI_COLDPLUG_ENABLED, |
222 | e927d487 | Michael S. Tsirkin | } PCIHotplugState; |
223 | e927d487 | Michael S. Tsirkin | |
224 | e927d487 | Michael S. Tsirkin | typedef int (*pci_hotplug_fn)(DeviceState *qdev, PCIDevice *pci_dev, |
225 | e927d487 | Michael S. Tsirkin | PCIHotplugState state); |
226 | 21eea4b3 | Gerd Hoffmann | void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
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227 | 21eea4b3 | Gerd Hoffmann | const char *name, int devfn_min); |
228 | 21eea4b3 | Gerd Hoffmann | PCIBus *pci_bus_new(DeviceState *parent, const char *name, int devfn_min); |
229 | 21eea4b3 | Gerd Hoffmann | void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
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230 | 21eea4b3 | Gerd Hoffmann | void *irq_opaque, int nirq); |
231 | 87c30546 | Isaku Yamahata | void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *dev);
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232 | 02e2da45 | Paul Brook | PCIBus *pci_register_bus(DeviceState *parent, const char *name, |
233 | 02e2da45 | Paul Brook | pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
234 | 5d4e84c8 | Juan Quintela | void *irq_opaque, int devfn_min, int nirq); |
235 | 9bb33586 | Isaku Yamahata | void pci_bus_reset(PCIBus *bus);
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236 | 87ecb68b | pbrook | |
237 | 2e01c8cf | Blue Swirl | void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base);
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238 | 2e01c8cf | Blue Swirl | |
239 | 5607c388 | Markus Armbruster | PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, |
240 | 5607c388 | Markus Armbruster | const char *default_devaddr); |
241 | 07caea31 | Markus Armbruster | PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char *default_model, |
242 | 07caea31 | Markus Armbruster | const char *default_devaddr); |
243 | 87ecb68b | pbrook | int pci_bus_num(PCIBus *s);
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244 | e822a52a | Isaku Yamahata | void pci_for_each_device(PCIBus *bus, int bus_num, void (*fn)(PCIBus *bus, PCIDevice *d)); |
245 | c469e1dd | Isaku Yamahata | PCIBus *pci_find_root_bus(int domain);
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246 | e075e788 | Isaku Yamahata | int pci_find_domain(const PCIBus *bus); |
247 | e822a52a | Isaku Yamahata | PCIBus *pci_find_bus(PCIBus *bus, int bus_num);
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248 | e822a52a | Isaku Yamahata | PCIDevice *pci_find_device(PCIBus *bus, int bus_num, int slot, int function); |
249 | 49bd1458 | Markus Armbruster | PCIBus *pci_get_bus_devfn(int *devfnp, const char *devaddr); |
250 | 87ecb68b | pbrook | |
251 | 43c945f1 | Isaku Yamahata | int pci_parse_devaddr(const char *addr, int *domp, int *busp, |
252 | 43c945f1 | Isaku Yamahata | unsigned int *slotp, unsigned int *funcp); |
253 | e9283f8b | Jan Kiszka | int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp, |
254 | e9283f8b | Jan Kiszka | unsigned *slotp);
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255 | 880345c4 | aliguori | |
256 | 163c8a59 | Luiz Capitulino | void do_pci_info_print(Monitor *mon, const QObject *data); |
257 | 163c8a59 | Luiz Capitulino | void do_pci_info(Monitor *mon, QObject **ret_data);
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258 | 783753fd | Isaku Yamahata | void pci_bridge_update_mappings(PCIBus *b);
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259 | 87ecb68b | pbrook | |
260 | a5d1fd20 | Isaku Yamahata | bool pci_msi_enabled(PCIDevice *dev);
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261 | a5d1fd20 | Isaku Yamahata | void pci_msi_notify(PCIDevice *dev, unsigned int vector); |
262 | 87ecb68b | pbrook | |
263 | deb54399 | aliguori | static inline void |
264 | 64d50b8b | Michael S. Tsirkin | pci_set_byte(uint8_t *config, uint8_t val) |
265 | 64d50b8b | Michael S. Tsirkin | { |
266 | 64d50b8b | Michael S. Tsirkin | *config = val; |
267 | 64d50b8b | Michael S. Tsirkin | } |
268 | 64d50b8b | Michael S. Tsirkin | |
269 | 64d50b8b | Michael S. Tsirkin | static inline uint8_t |
270 | cb95c2e4 | Stefan Weil | pci_get_byte(const uint8_t *config)
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271 | 64d50b8b | Michael S. Tsirkin | { |
272 | 64d50b8b | Michael S. Tsirkin | return *config;
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273 | 64d50b8b | Michael S. Tsirkin | } |
274 | 64d50b8b | Michael S. Tsirkin | |
275 | 64d50b8b | Michael S. Tsirkin | static inline void |
276 | 14e12559 | Michael S. Tsirkin | pci_set_word(uint8_t *config, uint16_t val) |
277 | 14e12559 | Michael S. Tsirkin | { |
278 | 14e12559 | Michael S. Tsirkin | cpu_to_le16wu((uint16_t *)config, val); |
279 | 14e12559 | Michael S. Tsirkin | } |
280 | 14e12559 | Michael S. Tsirkin | |
281 | 14e12559 | Michael S. Tsirkin | static inline uint16_t |
282 | cb95c2e4 | Stefan Weil | pci_get_word(const uint8_t *config)
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283 | 14e12559 | Michael S. Tsirkin | { |
284 | cb95c2e4 | Stefan Weil | return le16_to_cpupu((const uint16_t *)config); |
285 | 14e12559 | Michael S. Tsirkin | } |
286 | 14e12559 | Michael S. Tsirkin | |
287 | 14e12559 | Michael S. Tsirkin | static inline void |
288 | 14e12559 | Michael S. Tsirkin | pci_set_long(uint8_t *config, uint32_t val) |
289 | 14e12559 | Michael S. Tsirkin | { |
290 | 14e12559 | Michael S. Tsirkin | cpu_to_le32wu((uint32_t *)config, val); |
291 | 14e12559 | Michael S. Tsirkin | } |
292 | 14e12559 | Michael S. Tsirkin | |
293 | 14e12559 | Michael S. Tsirkin | static inline uint32_t |
294 | cb95c2e4 | Stefan Weil | pci_get_long(const uint8_t *config)
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295 | 14e12559 | Michael S. Tsirkin | { |
296 | cb95c2e4 | Stefan Weil | return le32_to_cpupu((const uint32_t *)config); |
297 | 14e12559 | Michael S. Tsirkin | } |
298 | 14e12559 | Michael S. Tsirkin | |
299 | 14e12559 | Michael S. Tsirkin | static inline void |
300 | fb5ce7d2 | Isaku Yamahata | pci_set_quad(uint8_t *config, uint64_t val) |
301 | fb5ce7d2 | Isaku Yamahata | { |
302 | fb5ce7d2 | Isaku Yamahata | cpu_to_le64w((uint64_t *)config, val); |
303 | fb5ce7d2 | Isaku Yamahata | } |
304 | fb5ce7d2 | Isaku Yamahata | |
305 | fb5ce7d2 | Isaku Yamahata | static inline uint64_t |
306 | cb95c2e4 | Stefan Weil | pci_get_quad(const uint8_t *config)
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307 | fb5ce7d2 | Isaku Yamahata | { |
308 | cb95c2e4 | Stefan Weil | return le64_to_cpup((const uint64_t *)config); |
309 | fb5ce7d2 | Isaku Yamahata | } |
310 | fb5ce7d2 | Isaku Yamahata | |
311 | fb5ce7d2 | Isaku Yamahata | static inline void |
312 | deb54399 | aliguori | pci_config_set_vendor_id(uint8_t *pci_config, uint16_t val) |
313 | deb54399 | aliguori | { |
314 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_VENDOR_ID], val); |
315 | deb54399 | aliguori | } |
316 | deb54399 | aliguori | |
317 | deb54399 | aliguori | static inline void |
318 | deb54399 | aliguori | pci_config_set_device_id(uint8_t *pci_config, uint16_t val) |
319 | deb54399 | aliguori | { |
320 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_DEVICE_ID], val); |
321 | deb54399 | aliguori | } |
322 | deb54399 | aliguori | |
323 | 173a543b | blueswir1 | static inline void |
324 | cf602c7b | Izik Eidus | pci_config_set_revision(uint8_t *pci_config, uint8_t val) |
325 | cf602c7b | Izik Eidus | { |
326 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_REVISION_ID], val); |
327 | cf602c7b | Izik Eidus | } |
328 | cf602c7b | Izik Eidus | |
329 | cf602c7b | Izik Eidus | static inline void |
330 | 173a543b | blueswir1 | pci_config_set_class(uint8_t *pci_config, uint16_t val) |
331 | 173a543b | blueswir1 | { |
332 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_CLASS_DEVICE], val); |
333 | 173a543b | blueswir1 | } |
334 | 173a543b | blueswir1 | |
335 | cf602c7b | Izik Eidus | static inline void |
336 | cf602c7b | Izik Eidus | pci_config_set_prog_interface(uint8_t *pci_config, uint8_t val) |
337 | cf602c7b | Izik Eidus | { |
338 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_CLASS_PROG], val); |
339 | cf602c7b | Izik Eidus | } |
340 | cf602c7b | Izik Eidus | |
341 | cf602c7b | Izik Eidus | static inline void |
342 | cf602c7b | Izik Eidus | pci_config_set_interrupt_pin(uint8_t *pci_config, uint8_t val) |
343 | cf602c7b | Izik Eidus | { |
344 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_INTERRUPT_PIN], val); |
345 | cf602c7b | Izik Eidus | } |
346 | cf602c7b | Izik Eidus | |
347 | aabcf526 | Isaku Yamahata | /*
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348 | aabcf526 | Isaku Yamahata | * helper functions to do bit mask operation on configuration space.
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349 | aabcf526 | Isaku Yamahata | * Just to set bit, use test-and-set and discard returned value.
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350 | aabcf526 | Isaku Yamahata | * Just to clear bit, use test-and-clear and discard returned value.
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351 | aabcf526 | Isaku Yamahata | * NOTE: They aren't atomic.
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352 | aabcf526 | Isaku Yamahata | */
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353 | aabcf526 | Isaku Yamahata | static inline uint8_t |
354 | aabcf526 | Isaku Yamahata | pci_byte_test_and_clear_mask(uint8_t *config, uint8_t mask) |
355 | aabcf526 | Isaku Yamahata | { |
356 | aabcf526 | Isaku Yamahata | uint8_t val = pci_get_byte(config); |
357 | aabcf526 | Isaku Yamahata | pci_set_byte(config, val & ~mask); |
358 | aabcf526 | Isaku Yamahata | return val & mask;
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359 | aabcf526 | Isaku Yamahata | } |
360 | aabcf526 | Isaku Yamahata | |
361 | aabcf526 | Isaku Yamahata | static inline uint8_t |
362 | aabcf526 | Isaku Yamahata | pci_byte_test_and_set_mask(uint8_t *config, uint8_t mask) |
363 | aabcf526 | Isaku Yamahata | { |
364 | aabcf526 | Isaku Yamahata | uint8_t val = pci_get_byte(config); |
365 | aabcf526 | Isaku Yamahata | pci_set_byte(config, val | mask); |
366 | aabcf526 | Isaku Yamahata | return val & mask;
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367 | aabcf526 | Isaku Yamahata | } |
368 | aabcf526 | Isaku Yamahata | |
369 | aabcf526 | Isaku Yamahata | static inline uint16_t |
370 | aabcf526 | Isaku Yamahata | pci_word_test_and_clear_mask(uint8_t *config, uint16_t mask) |
371 | aabcf526 | Isaku Yamahata | { |
372 | aabcf526 | Isaku Yamahata | uint16_t val = pci_get_word(config); |
373 | aabcf526 | Isaku Yamahata | pci_set_word(config, val & ~mask); |
374 | aabcf526 | Isaku Yamahata | return val & mask;
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375 | aabcf526 | Isaku Yamahata | } |
376 | aabcf526 | Isaku Yamahata | |
377 | aabcf526 | Isaku Yamahata | static inline uint16_t |
378 | aabcf526 | Isaku Yamahata | pci_word_test_and_set_mask(uint8_t *config, uint16_t mask) |
379 | aabcf526 | Isaku Yamahata | { |
380 | aabcf526 | Isaku Yamahata | uint16_t val = pci_get_word(config); |
381 | aabcf526 | Isaku Yamahata | pci_set_word(config, val | mask); |
382 | aabcf526 | Isaku Yamahata | return val & mask;
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383 | aabcf526 | Isaku Yamahata | } |
384 | aabcf526 | Isaku Yamahata | |
385 | aabcf526 | Isaku Yamahata | static inline uint32_t |
386 | aabcf526 | Isaku Yamahata | pci_long_test_and_clear_mask(uint8_t *config, uint32_t mask) |
387 | aabcf526 | Isaku Yamahata | { |
388 | aabcf526 | Isaku Yamahata | uint32_t val = pci_get_long(config); |
389 | aabcf526 | Isaku Yamahata | pci_set_long(config, val & ~mask); |
390 | aabcf526 | Isaku Yamahata | return val & mask;
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391 | aabcf526 | Isaku Yamahata | } |
392 | aabcf526 | Isaku Yamahata | |
393 | aabcf526 | Isaku Yamahata | static inline uint32_t |
394 | aabcf526 | Isaku Yamahata | pci_long_test_and_set_mask(uint8_t *config, uint32_t mask) |
395 | aabcf526 | Isaku Yamahata | { |
396 | aabcf526 | Isaku Yamahata | uint32_t val = pci_get_long(config); |
397 | aabcf526 | Isaku Yamahata | pci_set_long(config, val | mask); |
398 | aabcf526 | Isaku Yamahata | return val & mask;
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399 | aabcf526 | Isaku Yamahata | } |
400 | aabcf526 | Isaku Yamahata | |
401 | aabcf526 | Isaku Yamahata | static inline uint64_t |
402 | aabcf526 | Isaku Yamahata | pci_quad_test_and_clear_mask(uint8_t *config, uint64_t mask) |
403 | aabcf526 | Isaku Yamahata | { |
404 | aabcf526 | Isaku Yamahata | uint64_t val = pci_get_quad(config); |
405 | aabcf526 | Isaku Yamahata | pci_set_quad(config, val & ~mask); |
406 | aabcf526 | Isaku Yamahata | return val & mask;
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407 | aabcf526 | Isaku Yamahata | } |
408 | aabcf526 | Isaku Yamahata | |
409 | aabcf526 | Isaku Yamahata | static inline uint64_t |
410 | aabcf526 | Isaku Yamahata | pci_quad_test_and_set_mask(uint8_t *config, uint64_t mask) |
411 | aabcf526 | Isaku Yamahata | { |
412 | aabcf526 | Isaku Yamahata | uint64_t val = pci_get_quad(config); |
413 | aabcf526 | Isaku Yamahata | pci_set_quad(config, val | mask); |
414 | aabcf526 | Isaku Yamahata | return val & mask;
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415 | aabcf526 | Isaku Yamahata | } |
416 | aabcf526 | Isaku Yamahata | |
417 | 81a322d4 | Gerd Hoffmann | typedef int (*pci_qdev_initfn)(PCIDevice *dev); |
418 | 0aab0d3a | Gerd Hoffmann | typedef struct { |
419 | 0aab0d3a | Gerd Hoffmann | DeviceInfo qdev; |
420 | 0aab0d3a | Gerd Hoffmann | pci_qdev_initfn init; |
421 | e3936fa5 | Gerd Hoffmann | PCIUnregisterFunc *exit; |
422 | 0aab0d3a | Gerd Hoffmann | PCIConfigReadFunc *config_read; |
423 | 0aab0d3a | Gerd Hoffmann | PCIConfigWriteFunc *config_write; |
424 | a9f49946 | Isaku Yamahata | |
425 | e327e323 | Isaku Yamahata | /*
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426 | e327e323 | Isaku Yamahata | * pci-to-pci bridge or normal device.
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427 | e327e323 | Isaku Yamahata | * This doesn't mean pci host switch.
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428 | e327e323 | Isaku Yamahata | * When card bus bridge is supported, this would be enhanced.
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429 | e327e323 | Isaku Yamahata | */
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430 | e327e323 | Isaku Yamahata | int is_bridge;
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431 | fb231628 | Isaku Yamahata | |
432 | a9f49946 | Isaku Yamahata | /* pcie stuff */
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433 | 3c217c14 | Isaku Yamahata | int is_express; /* is this device pci express? */ |
434 | 8c52c8f3 | Gerd Hoffmann | |
435 | 8c52c8f3 | Gerd Hoffmann | /* rom bar */
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436 | 8c52c8f3 | Gerd Hoffmann | const char *romfile; |
437 | 0aab0d3a | Gerd Hoffmann | } PCIDeviceInfo; |
438 | 0aab0d3a | Gerd Hoffmann | |
439 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register(PCIDeviceInfo *info);
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440 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register_many(PCIDeviceInfo *info);
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441 | 6b1b92d3 | Paul Brook | |
442 | 49823868 | Isaku Yamahata | PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunction, |
443 | 49823868 | Isaku Yamahata | const char *name); |
444 | 49823868 | Isaku Yamahata | PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
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445 | 49823868 | Isaku Yamahata | bool multifunction,
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446 | 49823868 | Isaku Yamahata | const char *name); |
447 | 499cf102 | Markus Armbruster | PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); |
448 | 6b1b92d3 | Paul Brook | PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); |
449 | 6b1b92d3 | Paul Brook | |
450 | 3c18685f | Isaku Yamahata | static inline int pci_is_express(const PCIDevice *d) |
451 | a9f49946 | Isaku Yamahata | { |
452 | a9f49946 | Isaku Yamahata | return d->cap_present & QEMU_PCI_CAP_EXPRESS;
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453 | a9f49946 | Isaku Yamahata | } |
454 | a9f49946 | Isaku Yamahata | |
455 | 3c18685f | Isaku Yamahata | static inline uint32_t pci_config_size(const PCIDevice *d) |
456 | a9f49946 | Isaku Yamahata | { |
457 | a9f49946 | Isaku Yamahata | return pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE;
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458 | a9f49946 | Isaku Yamahata | } |
459 | a9f49946 | Isaku Yamahata | |
460 | 87ecb68b | pbrook | #endif |