Archipelago » qemu

#include "sysemu.h"

#include "arch_init.h"

#include "kvm.h"

#ifndef QEMU_ARCH_INIT_H

#define QEMU_ARCH_INIT_H

#include "qmp-commands.h"

enum {

    QEMU_ARCH_ALL = -1,

    QEMU_ARCH_ALPHA = 1,

    QEMU_ARCH_ARM = 2,

    QEMU_ARCH_CRIS = 4,

    QEMU_ARCH_I386 = 8,

    QEMU_ARCH_M68K = 16,

    QEMU_ARCH_LM32 = 32,

    QEMU_ARCH_MICROBLAZE = 64,

    QEMU_ARCH_MIPS = 128,

    QEMU_ARCH_PPC = 256,

    QEMU_ARCH_S390X = 512,

    QEMU_ARCH_SH4 = 1024,

    QEMU_ARCH_SPARC = 2048,

    QEMU_ARCH_XTENSA = 4096,

    QEMU_ARCH_OPENRISC = 8192,

    QEMU_ARCH_UNICORE32 = 0x4000,

};

extern const uint32_t arch_type;

void select_soundhw(const char *optarg);

void do_acpitable_option(const char *optarg);

void do_smbios_option(const char *optarg);

void cpudef_init(void);

int audio_available(void);

void audio_init(ISABus *isa_bus, PCIBus *pci_bus);

int tcg_available(void);

int kvm_available(void);

int xen_available(void);

CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp);

#endif

#include "sysemu.h"

#include "sysemu.h"

#include "kvm.h"

#include "balloon.h"

/*

 * Balloon

 *

 * Copyright IBM, Corp. 2008

 *

 * Authors:

 *  Anthony Liguori   <aliguori@us.ibm.com>

 *

 * This work is licensed under the terms of the GNU GPL, version 2.  See

 * the COPYING file in the top-level directory.

 *

 */

#ifndef _QEMU_BALLOON_H

#define _QEMU_BALLOON_H

#include "monitor/monitor.h"

#include "qapi-types.h"

typedef void (QEMUBalloonEvent)(void *opaque, ram_addr_t target);

typedef void (QEMUBalloonStatus)(void *opaque, BalloonInfo *info);

int qemu_add_balloon_handler(QEMUBalloonEvent *event_func,

			     QEMUBalloonStatus *stat_func, void *opaque);

void qemu_remove_balloon_handler(void *opaque);

void qemu_balloon_changed(int64_t actual);

#endif

#include "blockdev.h"

#include "sysemu.h"

#include "sysemu.h"     /* UUID_FMT */

#include "blockdev.h"

#include "sysemu.h"

#include "blockdev.h"

#include "sysemu.h"

#include "arch_init.h"

/*

 * QEMU host block devices

 *

 * Copyright (c) 2003-2008 Fabrice Bellard

 *

 * This work is licensed under the terms of the GNU GPL, version 2 or

 * later.  See the COPYING file in the top-level directory.

 */

#ifndef BLOCKDEV_H

#define BLOCKDEV_H

#include "block/block.h"

#include "qapi/error.h"

#include "qemu/queue.h"

void blockdev_mark_auto_del(BlockDriverState *bs);

void blockdev_auto_del(BlockDriverState *bs);

typedef enum {

    IF_DEFAULT = -1,            /* for use with drive_add() only */

    /*

     * IF_IDE must be zero, because we want QEMUMachine member

     * block_default_type to default-initialize to IF_IDE

     */

    IF_IDE = 0,

    IF_NONE,

    IF_SCSI, IF_FLOPPY, IF_PFLASH, IF_MTD, IF_SD, IF_VIRTIO, IF_XEN,

    IF_COUNT

} BlockInterfaceType;

struct DriveInfo {

    BlockDriverState *bdrv;

    char *id;

    const char *devaddr;

    BlockInterfaceType type;

    int bus;

    int unit;

    int auto_del;               /* see blockdev_mark_auto_del() */

    int media_cd;

    int cyls, heads, secs, trans;

    QemuOpts *opts;

    const char *serial;

    QTAILQ_ENTRY(DriveInfo) next;

    int refcount;

};

DriveInfo *drive_get(BlockInterfaceType type, int bus, int unit);

DriveInfo *drive_get_by_index(BlockInterfaceType type, int index);

int drive_get_max_bus(BlockInterfaceType type);

DriveInfo *drive_get_next(BlockInterfaceType type);

void drive_get_ref(DriveInfo *dinfo);

void drive_put_ref(DriveInfo *dinfo);

DriveInfo *drive_get_by_blockdev(BlockDriverState *bs);

QemuOpts *drive_def(const char *optstr);

QemuOpts *drive_add(BlockInterfaceType type, int index, const char *file,

                    const char *optstr);

DriveInfo *drive_init(QemuOpts *arg, BlockInterfaceType block_default_type);

/* device-hotplug */

DriveInfo *add_init_drive(const char *opts);

void qmp_change_blockdev(const char *device, const char *filename,

                         bool has_format, const char *format, Error **errp);

void do_commit(Monitor *mon, const QDict *qdict);

int do_drive_del(Monitor *mon, const QDict *qdict, QObject **ret_data);

#endif

#include "qtest.h"

#include "sysemu.h"

#include "dma.h"

#include "kvm.h"

#include "cpus.h"

#include "qtest.h"

#ifndef QEMU_CPUS_H

#define QEMU_CPUS_H

/* cpus.c */

void qemu_init_cpu_loop(void);

void resume_all_vcpus(void);

void pause_all_vcpus(void);

void cpu_stop_current(void);

void cpu_synchronize_all_states(void);

void cpu_synchronize_all_post_reset(void);

void cpu_synchronize_all_post_init(void);

void qtest_clock_warp(int64_t dest);

/* vl.c */

extern int smp_cores;

extern int smp_threads;

void set_numa_modes(void);

void set_cpu_log(const char *optarg);

void set_cpu_log_filename(const char *optarg);

void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg);

#endif

#include "device_tree.h"

/*

 * Header with function prototypes to help device tree manipulation using

 * libfdt. It also provides functions to read entries from device tree proc

 * interface.

 *

 * Copyright 2008 IBM Corporation.

 * Authors: Jerone Young <jyoung5@us.ibm.com>

 *          Hollis Blanchard <hollisb@us.ibm.com>

 *

 * This work is licensed under the GNU GPL license version 2 or later.

 *

 */

#ifndef __DEVICE_TREE_H__

#define __DEVICE_TREE_H__

void *create_device_tree(int *sizep);

void *load_device_tree(const char *filename_path, int *sizep);

int qemu_devtree_setprop(void *fdt, const char *node_path,

                         const char *property, const void *val_array, int size);

int qemu_devtree_setprop_cell(void *fdt, const char *node_path,

                              const char *property, uint32_t val);

int qemu_devtree_setprop_u64(void *fdt, const char *node_path,

                             const char *property, uint64_t val);

int qemu_devtree_setprop_string(void *fdt, const char *node_path,

                                const char *property, const char *string);

int qemu_devtree_setprop_phandle(void *fdt, const char *node_path,

                                 const char *property,

                                 const char *target_node_path);

const void *qemu_devtree_getprop(void *fdt, const char *node_path,

                                 const char *property, int *lenp);

uint32_t qemu_devtree_getprop_cell(void *fdt, const char *node_path,

                                   const char *property);

uint32_t qemu_devtree_get_phandle(void *fdt, const char *path);

uint32_t qemu_devtree_alloc_phandle(void *fdt);

int qemu_devtree_nop_node(void *fdt, const char *node_path);

int qemu_devtree_add_subnode(void *fdt, const char *name);

#define qemu_devtree_setprop_cells(fdt, node_path, property, ...)             \

    do {                                                                      \

        uint32_t qdt_tmp[] = { __VA_ARGS__ };                                 \

        int i;                                                                \

                                                                              \

        for (i = 0; i < ARRAY_SIZE(qdt_tmp); i++) {                           \

            qdt_tmp[i] = cpu_to_be32(qdt_tmp[i]);                             \

        }                                                                     \

        qemu_devtree_setprop(fdt, node_path, property, qdt_tmp,               \

                             sizeof(qdt_tmp));                                \

    } while (0)

void qemu_devtree_dumpdtb(void *fdt, int size);

#endif /* __DEVICE_TREE_H__ */

#include "dma.h"

/*

 * DMA helper functions

 *

 * Copyright (c) 2009 Red Hat

 *

 * This work is licensed under the terms of the GNU General Public License

 * (GNU GPL), version 2 or later.

 */

#ifndef DMA_H

#define DMA_H

#include <stdio.h>

#include "exec/memory.h"

#include "hw/hw.h"

#include "block/block.h"

#include "kvm.h"

typedef struct DMAContext DMAContext;

typedef struct ScatterGatherEntry ScatterGatherEntry;

typedef enum {

    DMA_DIRECTION_TO_DEVICE = 0,

    DMA_DIRECTION_FROM_DEVICE = 1,

} DMADirection;

struct QEMUSGList {

    ScatterGatherEntry *sg;

    int nsg;

    int nalloc;

    size_t size;

    DMAContext *dma;

};

#ifndef CONFIG_USER_ONLY

/*

 * When an IOMMU is present, bus addresses become distinct from

 * CPU/memory physical addresses and may be a different size.  Because

 * the IOVA size depends more on the bus than on the platform, we more

 * or less have to treat these as 64-bit always to cover all (or at

 * least most) cases.

 */

typedef uint64_t dma_addr_t;

#define DMA_ADDR_BITS 64

#define DMA_ADDR_FMT "%" PRIx64

typedef int DMATranslateFunc(DMAContext *dma,

                             dma_addr_t addr,

                             hwaddr *paddr,

                             hwaddr *len,

                             DMADirection dir);

typedef void* DMAMapFunc(DMAContext *dma,

                         dma_addr_t addr,

                         dma_addr_t *len,

                         DMADirection dir);

typedef void DMAUnmapFunc(DMAContext *dma,

                          void *buffer,

                          dma_addr_t len,

                          DMADirection dir,

                          dma_addr_t access_len);

struct DMAContext {

    AddressSpace *as;

    DMATranslateFunc *translate;

    DMAMapFunc *map;

    DMAUnmapFunc *unmap;

};

/* A global DMA context corresponding to the address_space_memory

 * AddressSpace, for sysbus devices which do DMA.

 */

extern DMAContext dma_context_memory;

static inline void dma_barrier(DMAContext *dma, DMADirection dir)

{

    /*

     * This is called before DMA read and write operations

     * unless the _relaxed form is used and is responsible

     * for providing some sane ordering of accesses vs

     * concurrently running VCPUs.

     *

     * Users of map(), unmap() or lower level st/ld_*

     * operations are responsible for providing their own

     * ordering via barriers.

     *

     * This primitive implementation does a simple smp_mb()

     * before each operation which provides pretty much full

     * ordering.

     *

     * A smarter implementation can be devised if needed to

     * use lighter barriers based on the direction of the

     * transfer, the DMA context, etc...

     */

    if (kvm_enabled()) {

        smp_mb();

    }

}

static inline bool dma_has_iommu(DMAContext *dma)

{

    return dma && dma->translate;

}

/* Checks that the given range of addresses is valid for DMA.  This is

 * useful for certain cases, but usually you should just use

 * dma_memory_{read,write}() and check for errors */

bool iommu_dma_memory_valid(DMAContext *dma, dma_addr_t addr, dma_addr_t len,

                            DMADirection dir);

static inline bool dma_memory_valid(DMAContext *dma,

                                    dma_addr_t addr, dma_addr_t len,

                                    DMADirection dir)

{

    if (!dma_has_iommu(dma)) {

        return true;

    } else {

        return iommu_dma_memory_valid(dma, addr, len, dir);

    }

}

int iommu_dma_memory_rw(DMAContext *dma, dma_addr_t addr,

                        void *buf, dma_addr_t len, DMADirection dir);

static inline int dma_memory_rw_relaxed(DMAContext *dma, dma_addr_t addr,

                                        void *buf, dma_addr_t len,

                                        DMADirection dir)

{

    if (!dma_has_iommu(dma)) {

        /* Fast-path for no IOMMU */

        address_space_rw(dma->as, addr, buf, len, dir == DMA_DIRECTION_FROM_DEVICE);

        return 0;

    } else {

        return iommu_dma_memory_rw(dma, addr, buf, len, dir);

    }

}

static inline int dma_memory_read_relaxed(DMAContext *dma, dma_addr_t addr,

                                          void *buf, dma_addr_t len)

{

    return dma_memory_rw_relaxed(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE);

}

static inline int dma_memory_write_relaxed(DMAContext *dma, dma_addr_t addr,

                                           const void *buf, dma_addr_t len)

{

    return dma_memory_rw_relaxed(dma, addr, (void *)buf, len,

                                 DMA_DIRECTION_FROM_DEVICE);

}

static inline int dma_memory_rw(DMAContext *dma, dma_addr_t addr,

                                void *buf, dma_addr_t len,

                                DMADirection dir)

{

    dma_barrier(dma, dir);

    return dma_memory_rw_relaxed(dma, addr, buf, len, dir);

}

static inline int dma_memory_read(DMAContext *dma, dma_addr_t addr,

                                  void *buf, dma_addr_t len)

{

    return dma_memory_rw(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE);

}

static inline int dma_memory_write(DMAContext *dma, dma_addr_t addr,

                                   const void *buf, dma_addr_t len)

{

    return dma_memory_rw(dma, addr, (void *)buf, len,

                         DMA_DIRECTION_FROM_DEVICE);

}

int iommu_dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c,

			 dma_addr_t len);

int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len);

void *iommu_dma_memory_map(DMAContext *dma,

                           dma_addr_t addr, dma_addr_t *len,

                           DMADirection dir);

static inline void *dma_memory_map(DMAContext *dma,

                                   dma_addr_t addr, dma_addr_t *len,

                                   DMADirection dir)

{

    if (!dma_has_iommu(dma)) {

        hwaddr xlen = *len;

        void *p;

        p = address_space_map(dma->as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE);

        *len = xlen;

        return p;

    } else {

        return iommu_dma_memory_map(dma, addr, len, dir);

    }

}

void iommu_dma_memory_unmap(DMAContext *dma,

                            void *buffer, dma_addr_t len,

                            DMADirection dir, dma_addr_t access_len);

static inline void dma_memory_unmap(DMAContext *dma,

                                    void *buffer, dma_addr_t len,

                                    DMADirection dir, dma_addr_t access_len)

{

    if (!dma_has_iommu(dma)) {

        address_space_unmap(dma->as, buffer, (hwaddr)len,

                            dir == DMA_DIRECTION_FROM_DEVICE, access_len);

    } else {

        iommu_dma_memory_unmap(dma, buffer, len, dir, access_len);

    }

}

#define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \

    static inline uint##_bits##_t ld##_lname##_##_end##_dma(DMAContext *dma, \

                                                            dma_addr_t addr) \

    {                                                                   \

        uint##_bits##_t val;                                            \

        dma_memory_read(dma, addr, &val, (_bits) / 8);                  \

        return _end##_bits##_to_cpu(val);                               \

    }                                                                   \

    static inline void st##_sname##_##_end##_dma(DMAContext *dma,       \

                                                 dma_addr_t addr,       \

                                                 uint##_bits##_t val)   \

    {                                                                   \

        val = cpu_to_##_end##_bits(val);                                \

        dma_memory_write(dma, addr, &val, (_bits) / 8);                 \

    }

static inline uint8_t ldub_dma(DMAContext *dma, dma_addr_t addr)

{

    uint8_t val;

    dma_memory_read(dma, addr, &val, 1);

    return val;

}

static inline void stb_dma(DMAContext *dma, dma_addr_t addr, uint8_t val)

{

    dma_memory_write(dma, addr, &val, 1);

}

DEFINE_LDST_DMA(uw, w, 16, le);

DEFINE_LDST_DMA(l, l, 32, le);

DEFINE_LDST_DMA(q, q, 64, le);

DEFINE_LDST_DMA(uw, w, 16, be);

DEFINE_LDST_DMA(l, l, 32, be);

DEFINE_LDST_DMA(q, q, 64, be);

#undef DEFINE_LDST_DMA

void dma_context_init(DMAContext *dma, AddressSpace *as, DMATranslateFunc translate,

                      DMAMapFunc map, DMAUnmapFunc unmap);

struct ScatterGatherEntry {

    dma_addr_t base;

    dma_addr_t len;

};

void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, DMAContext *dma);

void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);

void qemu_sglist_destroy(QEMUSGList *qsg);

#endif

typedef BlockDriverAIOCB *DMAIOFunc(BlockDriverState *bs, int64_t sector_num,

                                 QEMUIOVector *iov, int nb_sectors,

                                 BlockDriverCompletionFunc *cb, void *opaque);

BlockDriverAIOCB *dma_bdrv_io(BlockDriverState *bs,

                              QEMUSGList *sg, uint64_t sector_num,

                              DMAIOFunc *io_func, BlockDriverCompletionFunc *cb,

                              void *opaque, DMADirection dir);

BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,

                                QEMUSGList *sg, uint64_t sector,

                                BlockDriverCompletionFunc *cb, void *opaque);

BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs,

                                 QEMUSGList *sg, uint64_t sector,

                                 BlockDriverCompletionFunc *cb, void *opaque);

uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg);

uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg);

void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie,

                    QEMUSGList *sg, enum BlockAcctType type);

#endif

#include "dump.h"

#include "kvm.h"

#include "dump.h"

#include "sysemu.h"

#include "memory_mapping.h"

/*

 * QEMU dump

 *

 * Copyright Fujitsu, Corp. 2011, 2012

 *

 * Authors:

 *     Wen Congyang <wency@cn.fujitsu.com>

 *

 * This work is licensed under the terms of the GNU GPL, version 2 or later.

 * See the COPYING file in the top-level directory.

 *

 */

#ifndef DUMP_H

#define DUMP_H

typedef struct ArchDumpInfo {

    int d_machine;  /* Architecture */

    int d_endian;   /* ELFDATA2LSB or ELFDATA2MSB */

    int d_class;    /* ELFCLASS32 or ELFCLASS64 */

} ArchDumpInfo;

typedef int (*write_core_dump_function)(void *buf, size_t size, void *opaque);

int cpu_write_elf64_note(write_core_dump_function f, CPUArchState *env,

                                                  int cpuid, void *opaque);

int cpu_write_elf32_note(write_core_dump_function f, CPUArchState *env,

                                                  int cpuid, void *opaque);

int cpu_write_elf64_qemunote(write_core_dump_function f, CPUArchState *env,

                                                          void *opaque);

int cpu_write_elf32_qemunote(write_core_dump_function f, CPUArchState *env,

                                                          void *opaque);

int cpu_get_dump_info(ArchDumpInfo *info);

ssize_t cpu_get_note_size(int class, int machine, int nr_cpus);

#endif

#include "kvm.h"

#include "dma.h"

#include "xen-mapcache.h"

#include "sysemu.h"

#include "kvm.h"

#include "dma.h"

#include "sysemu.h"

#include "sysemu.h"

#include "kvm.h"

#include "sysemu.h"

#include "sysemu.h"

#include "sysemu.h"

#include "sysemu.h"

#include "sysemu.h"

#include "kvm.h"

#include "sysemu.h"

#include "device_tree.h"

#include "sysemu.h"

#include "blockdev.h"

#include "blockdev.h"

#include "blockdev.h"

#include "sysemu.h"

#include "sysemu.h"

#include "blockdev.h"

#include "sysemu.h"

#include "blockdev.h"

#include "sysemu.h"

#include "sysemu.h"

#include "dma.h"

#include "sysemu.h"

#include "dma.h"

#include "dma.h"

#include "sysemu.h"

#include "sysemu.h"

#include "sysemu.h"

#include "sysemu.h"

#include "sysemu.h"

#include "sysemu.h"

#include "blockdev.h"

#include "sysemu.h"

#include "sysemu.h"

#include "blockdev.h"

#include "sysemu.h"

#include "blockdev.h"

#include "dma.h"

#include "sysemu.h"

#include "dma.h"

#include "sysemu.h"

#include "dma.h"

#include "blockdev.h"

#include "dma.h"

#include "dma.h"

#include "sysemu.h"

#include "dma.h"

#include "dma.h"

#include "dma.h"

#include "dma.h"

#include "dma.h"

#include "blockdev.h"

#include "sysemu.h"

#include "dma.h"

#include "dma.h"

#include "blockdev.h"

#include "sysemu.h"

#include "sysemu.h"

#include "dma.h"