root / target-i386 / machine.c @ 9c17d615
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#include "hw/hw.h" |
---|---|
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#include "hw/boards.h" |
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#include "hw/pc.h" |
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#include "hw/isa.h" |
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|
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#include "cpu.h" |
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#include "sysemu/kvm.h" |
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|
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static const VMStateDescription vmstate_segment = { |
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.name = "segment",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT32(selector, SegmentCache), |
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VMSTATE_UINTTL(base, SegmentCache), |
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VMSTATE_UINT32(limit, SegmentCache), |
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VMSTATE_UINT32(flags, SegmentCache), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_SEGMENT(_field, _state) { \
|
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.name = (stringify(_field)), \ |
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.size = sizeof(SegmentCache), \
|
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.vmsd = &vmstate_segment, \ |
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.flags = VMS_STRUCT, \ |
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.offset = offsetof(_state, _field) \ |
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+ type_check(SegmentCache,typeof_field(_state, _field)) \ |
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} |
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|
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#define VMSTATE_SEGMENT_ARRAY(_field, _state, _n) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
|
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|
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static const VMStateDescription vmstate_xmm_reg = { |
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.name = "xmm_reg",
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(XMM_Q(0), XMMReg),
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VMSTATE_UINT64(XMM_Q(1), XMMReg),
|
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_XMM_REGS(_field, _state, _n) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
|
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|
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/* YMMH format is the same as XMM */
|
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static const VMStateDescription vmstate_ymmh_reg = { |
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.name = "ymmh_reg",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(XMM_Q(0), XMMReg),
|
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VMSTATE_UINT64(XMM_Q(1), XMMReg),
|
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg) |
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|
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static const VMStateDescription vmstate_mtrr_var = { |
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.name = "mtrr_var",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(base, MTRRVar), |
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VMSTATE_UINT64(mask, MTRRVar), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_MTRR_VARS(_field, _state, _n, _v) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar) |
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|
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static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size) |
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{ |
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fprintf(stderr, "call put_fpreg() with invalid arguments\n");
|
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exit(0);
|
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} |
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|
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/* XXX: add that in a FPU generic layer */
|
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union x86_longdouble {
|
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uint64_t mant; |
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uint16_t exp; |
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}; |
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|
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#define MANTD1(fp) (fp & ((1LL << 52) - 1)) |
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#define EXPBIAS1 1023 |
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#define EXPD1(fp) ((fp >> 52) & 0x7FF) |
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#define SIGND1(fp) ((fp >> 32) & 0x80000000) |
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|
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static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp) |
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{ |
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int e;
|
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/* mantissa */
|
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p->mant = (MANTD1(temp) << 11) | (1LL << 63); |
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/* exponent + sign */
|
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e = EXPD1(temp) - EXPBIAS1 + 16383;
|
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e |= SIGND1(temp) >> 16;
|
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p->exp = e; |
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} |
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|
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static int get_fpreg(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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uint64_t mant; |
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uint16_t exp; |
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|
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qemu_get_be64s(f, &mant); |
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qemu_get_be16s(f, &exp); |
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fp_reg->d = cpu_set_fp80(mant, exp); |
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return 0; |
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} |
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|
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static void put_fpreg(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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uint64_t mant; |
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uint16_t exp; |
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/* we save the real CPU data (in case of MMX usage only 'mant'
|
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contains the MMX register */
|
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cpu_get_fp80(&mant, &exp, fp_reg->d); |
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qemu_put_be64s(f, &mant); |
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qemu_put_be16s(f, &exp); |
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} |
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|
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static const VMStateInfo vmstate_fpreg = { |
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.name = "fpreg",
|
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.get = get_fpreg, |
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.put = put_fpreg, |
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}; |
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|
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static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size) |
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{ |
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union x86_longdouble *p = opaque;
|
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uint64_t mant; |
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|
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qemu_get_be64s(f, &mant); |
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p->mant = mant; |
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p->exp = 0xffff;
|
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return 0; |
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} |
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|
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static const VMStateInfo vmstate_fpreg_1_mmx = { |
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.name = "fpreg_1_mmx",
|
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.get = get_fpreg_1_mmx, |
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.put = put_fpreg_error, |
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}; |
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|
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static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size) |
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{ |
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union x86_longdouble *p = opaque;
|
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uint64_t mant; |
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|
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qemu_get_be64s(f, &mant); |
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fp64_to_fp80(p, mant); |
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return 0; |
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} |
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|
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static const VMStateInfo vmstate_fpreg_1_no_mmx = { |
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.name = "fpreg_1_no_mmx",
|
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.get = get_fpreg_1_no_mmx, |
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.put = put_fpreg_error, |
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}; |
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|
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static bool fpregs_is_0(void *opaque, int version_id) |
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{ |
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CPUX86State *env = opaque; |
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|
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return (env->fpregs_format_vmstate == 0); |
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} |
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|
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static bool fpregs_is_1_mmx(void *opaque, int version_id) |
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{ |
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CPUX86State *env = opaque; |
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int guess_mmx;
|
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|
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
|
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(env->fpus_vmstate & 0x3800) == 0); |
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return (guess_mmx && (env->fpregs_format_vmstate == 1)); |
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} |
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|
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static bool fpregs_is_1_no_mmx(void *opaque, int version_id) |
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{ |
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CPUX86State *env = opaque; |
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int guess_mmx;
|
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|
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
|
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(env->fpus_vmstate & 0x3800) == 0); |
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return (!guess_mmx && (env->fpregs_format_vmstate == 1)); |
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} |
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|
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#define VMSTATE_FP_REGS(_field, _state, _n) \
|
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \ |
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \ |
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg) |
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|
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static bool version_is_5(void *opaque, int version_id) |
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{ |
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return version_id == 5; |
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} |
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|
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#ifdef TARGET_X86_64
|
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static bool less_than_7(void *opaque, int version_id) |
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{ |
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return version_id < 7; |
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} |
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|
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static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size) |
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{ |
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uint64_t *v = pv; |
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*v = qemu_get_be32(f); |
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return 0; |
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} |
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|
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static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size) |
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{ |
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uint64_t *v = pv; |
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qemu_put_be32(f, *v); |
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} |
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|
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static const VMStateInfo vmstate_hack_uint64_as_uint32 = { |
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.name = "uint64_as_uint32",
|
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.get = get_uint64_as_uint32, |
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.put = put_uint64_as_uint32, |
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}; |
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|
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#define VMSTATE_HACK_UINT32(_f, _s, _t) \
|
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VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
|
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#endif
|
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|
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static void cpu_pre_save(void *opaque) |
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{ |
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CPUX86State *env = opaque; |
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int i;
|
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|
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/* FPU */
|
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env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
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env->fptag_vmstate = 0;
|
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for(i = 0; i < 8; i++) { |
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env->fptag_vmstate |= ((!env->fptags[i]) << i); |
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} |
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|
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env->fpregs_format_vmstate = 0;
|
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} |
252 |
|
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static int cpu_post_load(void *opaque, int version_id) |
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{ |
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CPUX86State *env = opaque; |
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int i;
|
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|
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/* XXX: restore FPU round state */
|
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env->fpstt = (env->fpus_vmstate >> 11) & 7; |
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env->fpus = env->fpus_vmstate & ~0x3800;
|
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env->fptag_vmstate ^= 0xff;
|
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for(i = 0; i < 8; i++) { |
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env->fptags[i] = (env->fptag_vmstate >> i) & 1;
|
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} |
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|
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cpu_breakpoint_remove_all(env, BP_CPU); |
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cpu_watchpoint_remove_all(env, BP_CPU); |
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for (i = 0; i < 4; i++) |
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hw_breakpoint_insert(env, i); |
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|
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tlb_flush(env, 1);
|
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return 0; |
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} |
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|
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static bool async_pf_msr_needed(void *opaque) |
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{ |
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CPUX86State *cpu = opaque; |
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|
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return cpu->async_pf_en_msr != 0; |
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} |
281 |
|
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static bool pv_eoi_msr_needed(void *opaque) |
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{ |
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CPUX86State *cpu = opaque; |
285 |
|
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return cpu->pv_eoi_en_msr != 0; |
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} |
288 |
|
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static const VMStateDescription vmstate_async_pf_msr = { |
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.name = "cpu/async_pf_msr",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(async_pf_en_msr, CPUX86State), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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static const VMStateDescription vmstate_pv_eoi_msr = { |
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.name = "cpu/async_pv_eoi_msr",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(pv_eoi_en_msr, CPUX86State), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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static bool fpop_ip_dp_needed(void *opaque) |
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{ |
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CPUX86State *env = opaque; |
314 |
|
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return env->fpop != 0 || env->fpip != 0 || env->fpdp != 0; |
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} |
317 |
|
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static const VMStateDescription vmstate_fpop_ip_dp = { |
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.name = "cpu/fpop_ip_dp",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT16(fpop, CPUX86State), |
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VMSTATE_UINT64(fpip, CPUX86State), |
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VMSTATE_UINT64(fpdp, CPUX86State), |
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VMSTATE_END_OF_LIST() |
328 |
} |
329 |
}; |
330 |
|
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static bool tscdeadline_needed(void *opaque) |
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{ |
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CPUX86State *env = opaque; |
334 |
|
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return env->tsc_deadline != 0; |
336 |
} |
337 |
|
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static const VMStateDescription vmstate_msr_tscdeadline = { |
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.name = "cpu/msr_tscdeadline",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(tsc_deadline, CPUX86State), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
348 |
|
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static bool misc_enable_needed(void *opaque) |
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{ |
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CPUX86State *env = opaque; |
352 |
|
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return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT;
|
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} |
355 |
|
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static const VMStateDescription vmstate_msr_ia32_misc_enable = { |
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.name = "cpu/msr_ia32_misc_enable",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
362 |
VMSTATE_UINT64(msr_ia32_misc_enable, CPUX86State), |
363 |
VMSTATE_END_OF_LIST() |
364 |
} |
365 |
}; |
366 |
|
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static const VMStateDescription vmstate_cpu = { |
368 |
.name = "cpu",
|
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.version_id = CPU_SAVE_VERSION, |
370 |
.minimum_version_id = 3,
|
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.minimum_version_id_old = 3,
|
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.pre_save = cpu_pre_save, |
373 |
.post_load = cpu_post_load, |
374 |
.fields = (VMStateField []) { |
375 |
VMSTATE_UINTTL_ARRAY(regs, CPUX86State, CPU_NB_REGS), |
376 |
VMSTATE_UINTTL(eip, CPUX86State), |
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VMSTATE_UINTTL(eflags, CPUX86State), |
378 |
VMSTATE_UINT32(hflags, CPUX86State), |
379 |
/* FPU */
|
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VMSTATE_UINT16(fpuc, CPUX86State), |
381 |
VMSTATE_UINT16(fpus_vmstate, CPUX86State), |
382 |
VMSTATE_UINT16(fptag_vmstate, CPUX86State), |
383 |
VMSTATE_UINT16(fpregs_format_vmstate, CPUX86State), |
384 |
VMSTATE_FP_REGS(fpregs, CPUX86State, 8),
|
385 |
|
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VMSTATE_SEGMENT_ARRAY(segs, CPUX86State, 6),
|
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VMSTATE_SEGMENT(ldt, CPUX86State), |
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VMSTATE_SEGMENT(tr, CPUX86State), |
389 |
VMSTATE_SEGMENT(gdt, CPUX86State), |
390 |
VMSTATE_SEGMENT(idt, CPUX86State), |
391 |
|
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VMSTATE_UINT32(sysenter_cs, CPUX86State), |
393 |
#ifdef TARGET_X86_64
|
394 |
/* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
|
395 |
VMSTATE_HACK_UINT32(sysenter_esp, CPUX86State, less_than_7), |
396 |
VMSTATE_HACK_UINT32(sysenter_eip, CPUX86State, less_than_7), |
397 |
VMSTATE_UINTTL_V(sysenter_esp, CPUX86State, 7),
|
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VMSTATE_UINTTL_V(sysenter_eip, CPUX86State, 7),
|
399 |
#else
|
400 |
VMSTATE_UINTTL(sysenter_esp, CPUX86State), |
401 |
VMSTATE_UINTTL(sysenter_eip, CPUX86State), |
402 |
#endif
|
403 |
|
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VMSTATE_UINTTL(cr[0], CPUX86State),
|
405 |
VMSTATE_UINTTL(cr[2], CPUX86State),
|
406 |
VMSTATE_UINTTL(cr[3], CPUX86State),
|
407 |
VMSTATE_UINTTL(cr[4], CPUX86State),
|
408 |
VMSTATE_UINTTL_ARRAY(dr, CPUX86State, 8),
|
409 |
/* MMU */
|
410 |
VMSTATE_INT32(a20_mask, CPUX86State), |
411 |
/* XMM */
|
412 |
VMSTATE_UINT32(mxcsr, CPUX86State), |
413 |
VMSTATE_XMM_REGS(xmm_regs, CPUX86State, CPU_NB_REGS), |
414 |
|
415 |
#ifdef TARGET_X86_64
|
416 |
VMSTATE_UINT64(efer, CPUX86State), |
417 |
VMSTATE_UINT64(star, CPUX86State), |
418 |
VMSTATE_UINT64(lstar, CPUX86State), |
419 |
VMSTATE_UINT64(cstar, CPUX86State), |
420 |
VMSTATE_UINT64(fmask, CPUX86State), |
421 |
VMSTATE_UINT64(kernelgsbase, CPUX86State), |
422 |
#endif
|
423 |
VMSTATE_UINT32_V(smbase, CPUX86State, 4),
|
424 |
|
425 |
VMSTATE_UINT64_V(pat, CPUX86State, 5),
|
426 |
VMSTATE_UINT32_V(hflags2, CPUX86State, 5),
|
427 |
|
428 |
VMSTATE_UINT32_TEST(halted, CPUX86State, version_is_5), |
429 |
VMSTATE_UINT64_V(vm_hsave, CPUX86State, 5),
|
430 |
VMSTATE_UINT64_V(vm_vmcb, CPUX86State, 5),
|
431 |
VMSTATE_UINT64_V(tsc_offset, CPUX86State, 5),
|
432 |
VMSTATE_UINT64_V(intercept, CPUX86State, 5),
|
433 |
VMSTATE_UINT16_V(intercept_cr_read, CPUX86State, 5),
|
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VMSTATE_UINT16_V(intercept_cr_write, CPUX86State, 5),
|
435 |
VMSTATE_UINT16_V(intercept_dr_read, CPUX86State, 5),
|
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VMSTATE_UINT16_V(intercept_dr_write, CPUX86State, 5),
|
437 |
VMSTATE_UINT32_V(intercept_exceptions, CPUX86State, 5),
|
438 |
VMSTATE_UINT8_V(v_tpr, CPUX86State, 5),
|
439 |
/* MTRRs */
|
440 |
VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUX86State, 11, 8), |
441 |
VMSTATE_UINT64_V(mtrr_deftype, CPUX86State, 8),
|
442 |
VMSTATE_MTRR_VARS(mtrr_var, CPUX86State, 8, 8), |
443 |
/* KVM-related states */
|
444 |
VMSTATE_INT32_V(interrupt_injected, CPUX86State, 9),
|
445 |
VMSTATE_UINT32_V(mp_state, CPUX86State, 9),
|
446 |
VMSTATE_UINT64_V(tsc, CPUX86State, 9),
|
447 |
VMSTATE_INT32_V(exception_injected, CPUX86State, 11),
|
448 |
VMSTATE_UINT8_V(soft_interrupt, CPUX86State, 11),
|
449 |
VMSTATE_UINT8_V(nmi_injected, CPUX86State, 11),
|
450 |
VMSTATE_UINT8_V(nmi_pending, CPUX86State, 11),
|
451 |
VMSTATE_UINT8_V(has_error_code, CPUX86State, 11),
|
452 |
VMSTATE_UINT32_V(sipi_vector, CPUX86State, 11),
|
453 |
/* MCE */
|
454 |
VMSTATE_UINT64_V(mcg_cap, CPUX86State, 10),
|
455 |
VMSTATE_UINT64_V(mcg_status, CPUX86State, 10),
|
456 |
VMSTATE_UINT64_V(mcg_ctl, CPUX86State, 10),
|
457 |
VMSTATE_UINT64_ARRAY_V(mce_banks, CPUX86State, MCE_BANKS_DEF *4, 10), |
458 |
/* rdtscp */
|
459 |
VMSTATE_UINT64_V(tsc_aux, CPUX86State, 11),
|
460 |
/* KVM pvclock msr */
|
461 |
VMSTATE_UINT64_V(system_time_msr, CPUX86State, 11),
|
462 |
VMSTATE_UINT64_V(wall_clock_msr, CPUX86State, 11),
|
463 |
/* XSAVE related fields */
|
464 |
VMSTATE_UINT64_V(xcr0, CPUX86State, 12),
|
465 |
VMSTATE_UINT64_V(xstate_bv, CPUX86State, 12),
|
466 |
VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUX86State, CPU_NB_REGS, 12),
|
467 |
VMSTATE_END_OF_LIST() |
468 |
/* The above list is not sorted /wrt version numbers, watch out! */
|
469 |
}, |
470 |
.subsections = (VMStateSubsection []) { |
471 |
{ |
472 |
.vmsd = &vmstate_async_pf_msr, |
473 |
.needed = async_pf_msr_needed, |
474 |
} , { |
475 |
.vmsd = &vmstate_pv_eoi_msr, |
476 |
.needed = pv_eoi_msr_needed, |
477 |
} , { |
478 |
.vmsd = &vmstate_fpop_ip_dp, |
479 |
.needed = fpop_ip_dp_needed, |
480 |
}, { |
481 |
.vmsd = &vmstate_msr_tscdeadline, |
482 |
.needed = tscdeadline_needed, |
483 |
}, { |
484 |
.vmsd = &vmstate_msr_ia32_misc_enable, |
485 |
.needed = misc_enable_needed, |
486 |
} , { |
487 |
/* empty */
|
488 |
} |
489 |
} |
490 |
}; |
491 |
|
492 |
void cpu_save(QEMUFile *f, void *opaque) |
493 |
{ |
494 |
vmstate_save_state(f, &vmstate_cpu, opaque); |
495 |
} |
496 |
|
497 |
int cpu_load(QEMUFile *f, void *opaque, int version_id) |
498 |
{ |
499 |
return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
|
500 |
} |