root / target-sparc / int32_helper.c @ 9c17d615
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/*
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* Sparc32 interrupt helpers
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h" |
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#include "trace.h" |
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#include "sysemu/sysemu.h" |
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#define DEBUG_PCALL
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#ifdef DEBUG_PCALL
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static const char * const excp_names[0x80] = { |
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[TT_TFAULT] = "Instruction Access Fault",
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[TT_ILL_INSN] = "Illegal Instruction",
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[TT_PRIV_INSN] = "Privileged Instruction",
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[TT_NFPU_INSN] = "FPU Disabled",
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[TT_WIN_OVF] = "Window Overflow",
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[TT_WIN_UNF] = "Window Underflow",
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[TT_UNALIGNED] = "Unaligned Memory Access",
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[TT_FP_EXCP] = "FPU Exception",
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[TT_DFAULT] = "Data Access Fault",
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[TT_TOVF] = "Tag Overflow",
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[TT_EXTINT | 0x1] = "External Interrupt 1", |
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[TT_EXTINT | 0x2] = "External Interrupt 2", |
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[TT_EXTINT | 0x3] = "External Interrupt 3", |
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[TT_EXTINT | 0x4] = "External Interrupt 4", |
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[TT_EXTINT | 0x5] = "External Interrupt 5", |
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[TT_EXTINT | 0x6] = "External Interrupt 6", |
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[TT_EXTINT | 0x7] = "External Interrupt 7", |
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[TT_EXTINT | 0x8] = "External Interrupt 8", |
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[TT_EXTINT | 0x9] = "External Interrupt 9", |
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[TT_EXTINT | 0xa] = "External Interrupt 10", |
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[TT_EXTINT | 0xb] = "External Interrupt 11", |
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[TT_EXTINT | 0xc] = "External Interrupt 12", |
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[TT_EXTINT | 0xd] = "External Interrupt 13", |
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[TT_EXTINT | 0xe] = "External Interrupt 14", |
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[TT_EXTINT | 0xf] = "External Interrupt 15", |
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[TT_TOVF] = "Tag Overflow",
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[TT_CODE_ACCESS] = "Instruction Access Error",
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[TT_DATA_ACCESS] = "Data Access Error",
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[TT_DIV_ZERO] = "Division By Zero",
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[TT_NCP_INSN] = "Coprocessor Disabled",
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}; |
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#endif
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void do_interrupt(CPUSPARCState *env)
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{ |
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int cwp, intno = env->exception_index;
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/* Compute PSR before exposing state. */
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if (env->cc_op != CC_OP_FLAGS) {
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cpu_get_psr(env); |
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} |
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#ifdef DEBUG_PCALL
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if (qemu_loglevel_mask(CPU_LOG_INT)) {
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static int count; |
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const char *name; |
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if (intno < 0 || intno >= 0x100) { |
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name = "Unknown";
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} else if (intno >= 0x80) { |
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name = "Trap Instruction";
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} else {
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name = excp_names[intno]; |
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if (!name) {
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name = "Unknown";
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} |
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} |
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qemu_log("%6d: %s (v=%02x)\n", count, name, intno);
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log_cpu_state(env, 0);
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#if 0
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{
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int i;
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uint8_t *ptr;
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qemu_log(" code=");
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ptr = (uint8_t *)env->pc;
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for (i = 0; i < 16; i++) {
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qemu_log(" %02x", ldub(ptr + i));
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}
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qemu_log("\n");
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}
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#endif
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count++; |
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} |
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#endif
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#if !defined(CONFIG_USER_ONLY)
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if (env->psret == 0) { |
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if (env->exception_index == 0x80 && |
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env->def->features & CPU_FEATURE_TA0_SHUTDOWN) { |
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qemu_system_shutdown_request(); |
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} else {
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cpu_abort(env, "Trap 0x%02x while interrupts disabled, Error state",
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env->exception_index); |
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} |
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return;
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} |
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#endif
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env->psret = 0;
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cwp = cpu_cwp_dec(env, env->cwp - 1);
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cpu_set_cwp(env, cwp); |
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env->regwptr[9] = env->pc;
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env->regwptr[10] = env->npc;
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env->psrps = env->psrs; |
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env->psrs = 1;
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env->tbr = (env->tbr & TBR_BASE_MASK) | (intno << 4);
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env->pc = env->tbr; |
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env->npc = env->pc + 4;
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env->exception_index = -1;
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#if !defined(CONFIG_USER_ONLY)
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/* IRQ acknowledgment */
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if ((intno & ~15) == TT_EXTINT && env->qemu_irq_ack != NULL) { |
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env->qemu_irq_ack(env, env->irq_manager, intno); |
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} |
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#endif
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} |
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#if !defined(CONFIG_USER_ONLY)
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static void leon3_cache_control_int(CPUSPARCState *env) |
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{ |
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uint32_t state = 0;
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if (env->cache_control & CACHE_CTRL_IF) {
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/* Instruction cache state */
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state = env->cache_control & CACHE_STATE_MASK; |
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if (state == CACHE_ENABLED) {
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state = CACHE_FROZEN; |
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trace_int_helper_icache_freeze(); |
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} |
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env->cache_control &= ~CACHE_STATE_MASK; |
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env->cache_control |= state; |
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} |
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if (env->cache_control & CACHE_CTRL_DF) {
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/* Data cache state */
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state = (env->cache_control >> 2) & CACHE_STATE_MASK;
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if (state == CACHE_ENABLED) {
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state = CACHE_FROZEN; |
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trace_int_helper_dcache_freeze(); |
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} |
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env->cache_control &= ~(CACHE_STATE_MASK << 2);
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env->cache_control |= (state << 2);
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} |
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} |
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void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno) |
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{ |
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leon3_irq_ack(irq_manager, intno); |
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leon3_cache_control_int(env); |
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} |
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#endif
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